50ea41240b8b50546edb396ce37e029d61c67c77
[openwrt/staging/jow.git] /
1 From 93408c858e5dc01d97c55efa721268f63fde2ae5 Mon Sep 17 00:00:00 2001
2 Message-Id: <93408c858e5dc01d97c55efa721268f63fde2ae5.1662886034.git.lorenzo@kernel.org>
3 In-Reply-To: <e5ecb4f619197b93fa682d722452dc8412864cdb.1662886033.git.lorenzo@kernel.org>
4 References: <e5ecb4f619197b93fa682d722452dc8412864cdb.1662886033.git.lorenzo@kernel.org>
5 From: Lorenzo Bianconi <lorenzo@kernel.org>
6 Date: Sat, 3 Sep 2022 18:34:09 +0200
7 Subject: [PATCH net-next 4/5] net: ethernet: mtk_eth_soc: introduce flow
8 offloading support for mt7986
9
10 Introduce hw flow offload support for mt7986 chipset. PPE is not enabled
11 yet in mt7986 since mt76 support is not available yet.
12
13 Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
14 Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
15 Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
16 Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
17 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
18 ---
19 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 11 +-
20 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 72 ++++++
21 drivers/net/ethernet/mediatek/mtk_ppe.c | 213 +++++++++++-------
22 drivers/net/ethernet/mediatek/mtk_ppe.h | 52 ++++-
23 .../net/ethernet/mediatek/mtk_ppe_offload.c | 49 ++--
24 drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 8 +
25 6 files changed, 289 insertions(+), 116 deletions(-)
26
27 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
28 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
29 @@ -1859,12 +1859,14 @@ static int mtk_poll_rx(struct napi_struc
30 bytes += skb->len;
31
32 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
33 + reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5);
34 hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY;
35 if (hash != MTK_RXD5_FOE_ENTRY)
36 skb_set_hash(skb, jhash_1word(hash, 0),
37 PKT_HASH_TYPE_L4);
38 rxdcsum = &trxd.rxd3;
39 } else {
40 + reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4);
41 hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
42 if (hash != MTK_RXD4_FOE_ENTRY)
43 skb_set_hash(skb, jhash_1word(hash, 0),
44 @@ -1878,7 +1880,6 @@ static int mtk_poll_rx(struct napi_struc
45 skb_checksum_none_assert(skb);
46 skb->protocol = eth_type_trans(skb, netdev);
47
48 - reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4);
49 if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
50 mtk_ppe_check_skb(eth->ppe[0], skb, hash);
51
52 @@ -4177,7 +4178,7 @@ static const struct mtk_soc_data mt7621_
53 .required_pctl = false,
54 .offload_version = 2,
55 .hash_offset = 2,
56 - .foe_entry_size = sizeof(struct mtk_foe_entry),
57 + .foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
58 .txrx = {
59 .txd_size = sizeof(struct mtk_tx_dma),
60 .rxd_size = sizeof(struct mtk_rx_dma),
61 @@ -4197,7 +4198,7 @@ static const struct mtk_soc_data mt7622_
62 .required_pctl = false,
63 .offload_version = 2,
64 .hash_offset = 2,
65 - .foe_entry_size = sizeof(struct mtk_foe_entry),
66 + .foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
67 .txrx = {
68 .txd_size = sizeof(struct mtk_tx_dma),
69 .rxd_size = sizeof(struct mtk_rx_dma),
70 @@ -4216,7 +4217,7 @@ static const struct mtk_soc_data mt7623_
71 .required_pctl = true,
72 .offload_version = 2,
73 .hash_offset = 2,
74 - .foe_entry_size = sizeof(struct mtk_foe_entry),
75 + .foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
76 .txrx = {
77 .txd_size = sizeof(struct mtk_tx_dma),
78 .rxd_size = sizeof(struct mtk_rx_dma),
79 @@ -4248,9 +4249,11 @@ static const struct mtk_soc_data mt7986_
80 .reg_map = &mt7986_reg_map,
81 .ana_rgc3 = 0x128,
82 .caps = MT7986_CAPS,
83 + .hw_features = MTK_HW_FEATURES,
84 .required_clks = MT7986_CLKS_BITMAP,
85 .required_pctl = false,
86 .hash_offset = 4,
87 + .foe_entry_size = sizeof(struct mtk_foe_entry),
88 .txrx = {
89 .txd_size = sizeof(struct mtk_tx_dma_v2),
90 .rxd_size = sizeof(struct mtk_rx_dma_v2),
91 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
92 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
93 @@ -1151,6 +1151,78 @@ mtk_foe_get_entry(struct mtk_ppe *ppe, u
94 return ppe->foe_table + hash * soc->foe_entry_size;
95 }
96
97 +static inline u32 mtk_get_ib1_ts_mask(struct mtk_eth *eth)
98 +{
99 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
100 + return MTK_FOE_IB1_BIND_TIMESTAMP_V2;
101 +
102 + return MTK_FOE_IB1_BIND_TIMESTAMP;
103 +}
104 +
105 +static inline u32 mtk_get_ib1_ppoe_mask(struct mtk_eth *eth)
106 +{
107 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
108 + return MTK_FOE_IB1_BIND_PPPOE_V2;
109 +
110 + return MTK_FOE_IB1_BIND_PPPOE;
111 +}
112 +
113 +static inline u32 mtk_get_ib1_vlan_tag_mask(struct mtk_eth *eth)
114 +{
115 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
116 + return MTK_FOE_IB1_BIND_VLAN_TAG_V2;
117 +
118 + return MTK_FOE_IB1_BIND_VLAN_TAG;
119 +}
120 +
121 +static inline u32 mtk_get_ib1_vlan_layer_mask(struct mtk_eth *eth)
122 +{
123 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
124 + return MTK_FOE_IB1_BIND_VLAN_LAYER_V2;
125 +
126 + return MTK_FOE_IB1_BIND_VLAN_LAYER;
127 +}
128 +
129 +static inline u32 mtk_prep_ib1_vlan_layer(struct mtk_eth *eth, u32 val)
130 +{
131 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
132 + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val);
133 +
134 + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, val);
135 +}
136 +
137 +static inline u32 mtk_get_ib1_vlan_layer(struct mtk_eth *eth, u32 val)
138 +{
139 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
140 + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val);
141 +
142 + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, val);
143 +}
144 +
145 +static inline u32 mtk_get_ib1_pkt_type_mask(struct mtk_eth *eth)
146 +{
147 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
148 + return MTK_FOE_IB1_PACKET_TYPE_V2;
149 +
150 + return MTK_FOE_IB1_PACKET_TYPE;
151 +}
152 +
153 +static inline u32 mtk_get_ib1_pkt_type(struct mtk_eth *eth, u32 val)
154 +{
155 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
156 + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE_V2, val);
157 +
158 + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, val);
159 +}
160 +
161 +static inline u32 mtk_get_ib2_multicast_mask(struct mtk_eth *eth)
162 +{
163 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
164 + return MTK_FOE_IB2_MULTICAST_V2;
165 +
166 + return MTK_FOE_IB2_MULTICAST;
167 +}
168 +
169 /* read the hardware status register */
170 void mtk_stats_update_mac(struct mtk_mac *mac);
171
172 --- a/drivers/net/ethernet/mediatek/mtk_ppe.c
173 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
174 @@ -56,7 +56,7 @@ static u32 ppe_clear(struct mtk_ppe *ppe
175
176 static u32 mtk_eth_timestamp(struct mtk_eth *eth)
177 {
178 - return mtk_r32(eth, 0x0010) & MTK_FOE_IB1_BIND_TIMESTAMP;
179 + return mtk_r32(eth, 0x0010) & mtk_get_ib1_ts_mask(eth);
180 }
181
182 static int mtk_ppe_wait_busy(struct mtk_ppe *ppe)
183 @@ -93,7 +93,7 @@ static u32 mtk_ppe_hash_entry(struct mtk
184 u32 hv1, hv2, hv3;
185 u32 hash;
186
187 - switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) {
188 + switch (mtk_get_ib1_pkt_type(eth, e->ib1)) {
189 case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
190 case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
191 hv1 = e->ipv4.orig.ports;
192 @@ -129,9 +129,9 @@ static u32 mtk_ppe_hash_entry(struct mtk
193 }
194
195 static inline struct mtk_foe_mac_info *
196 -mtk_foe_entry_l2(struct mtk_foe_entry *entry)
197 +mtk_foe_entry_l2(struct mtk_eth *eth, struct mtk_foe_entry *entry)
198 {
199 - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
200 + int type = mtk_get_ib1_pkt_type(eth, entry->ib1);
201
202 if (type == MTK_PPE_PKT_TYPE_BRIDGE)
203 return &entry->bridge.l2;
204 @@ -143,9 +143,9 @@ mtk_foe_entry_l2(struct mtk_foe_entry *e
205 }
206
207 static inline u32 *
208 -mtk_foe_entry_ib2(struct mtk_foe_entry *entry)
209 +mtk_foe_entry_ib2(struct mtk_eth *eth, struct mtk_foe_entry *entry)
210 {
211 - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
212 + int type = mtk_get_ib1_pkt_type(eth, entry->ib1);
213
214 if (type == MTK_PPE_PKT_TYPE_BRIDGE)
215 return &entry->bridge.ib2;
216 @@ -156,27 +156,38 @@ mtk_foe_entry_ib2(struct mtk_foe_entry *
217 return &entry->ipv4.ib2;
218 }
219
220 -int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
221 - u8 pse_port, u8 *src_mac, u8 *dest_mac)
222 +int mtk_foe_entry_prepare(struct mtk_eth *eth, struct mtk_foe_entry *entry,
223 + int type, int l4proto, u8 pse_port, u8 *src_mac,
224 + u8 *dest_mac)
225 {
226 struct mtk_foe_mac_info *l2;
227 u32 ports_pad, val;
228
229 memset(entry, 0, sizeof(*entry));
230
231 - val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |
232 - FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE, type) |
233 - FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |
234 - MTK_FOE_IB1_BIND_TTL |
235 - MTK_FOE_IB1_BIND_CACHE;
236 - entry->ib1 = val;
237 -
238 - val = FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
239 - FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0x1f) |
240 - FIELD_PREP(MTK_FOE_IB2_DEST_PORT, pse_port);
241 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
242 + val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |
243 + FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE_V2, type) |
244 + FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |
245 + MTK_FOE_IB1_BIND_CACHE_V2 | MTK_FOE_IB1_BIND_TTL_V2;
246 + entry->ib1 = val;
247 +
248 + val = FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, pse_port) |
249 + FIELD_PREP(MTK_FOE_IB2_PORT_AG_V2, 0xf);
250 + } else {
251 + val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |
252 + FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE, type) |
253 + FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |
254 + MTK_FOE_IB1_BIND_CACHE | MTK_FOE_IB1_BIND_TTL;
255 + entry->ib1 = val;
256 +
257 + val = FIELD_PREP(MTK_FOE_IB2_DEST_PORT, pse_port) |
258 + FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
259 + FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0x1f);
260 + }
261
262 if (is_multicast_ether_addr(dest_mac))
263 - val |= MTK_FOE_IB2_MULTICAST;
264 + val |= mtk_get_ib2_multicast_mask(eth);
265
266 ports_pad = 0xa5a5a500 | (l4proto & 0xff);
267 if (type == MTK_PPE_PKT_TYPE_IPV4_ROUTE)
268 @@ -210,24 +221,30 @@ int mtk_foe_entry_prepare(struct mtk_foe
269 return 0;
270 }
271
272 -int mtk_foe_entry_set_pse_port(struct mtk_foe_entry *entry, u8 port)
273 +int mtk_foe_entry_set_pse_port(struct mtk_eth *eth,
274 + struct mtk_foe_entry *entry, u8 port)
275 {
276 - u32 *ib2 = mtk_foe_entry_ib2(entry);
277 - u32 val;
278 + u32 *ib2 = mtk_foe_entry_ib2(eth, entry);
279 + u32 val = *ib2;
280
281 - val = *ib2;
282 - val &= ~MTK_FOE_IB2_DEST_PORT;
283 - val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT, port);
284 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
285 + val &= ~MTK_FOE_IB2_DEST_PORT_V2;
286 + val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, port);
287 + } else {
288 + val &= ~MTK_FOE_IB2_DEST_PORT;
289 + val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT, port);
290 + }
291 *ib2 = val;
292
293 return 0;
294 }
295
296 -int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool egress,
297 +int mtk_foe_entry_set_ipv4_tuple(struct mtk_eth *eth,
298 + struct mtk_foe_entry *entry, bool egress,
299 __be32 src_addr, __be16 src_port,
300 __be32 dest_addr, __be16 dest_port)
301 {
302 - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
303 + int type = mtk_get_ib1_pkt_type(eth, entry->ib1);
304 struct mtk_ipv4_tuple *t;
305
306 switch (type) {
307 @@ -262,11 +279,12 @@ int mtk_foe_entry_set_ipv4_tuple(struct
308 return 0;
309 }
310
311 -int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
312 +int mtk_foe_entry_set_ipv6_tuple(struct mtk_eth *eth,
313 + struct mtk_foe_entry *entry,
314 __be32 *src_addr, __be16 src_port,
315 __be32 *dest_addr, __be16 dest_port)
316 {
317 - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1);
318 + int type = mtk_get_ib1_pkt_type(eth, entry->ib1);
319 u32 *src, *dest;
320 int i;
321
322 @@ -297,39 +315,41 @@ int mtk_foe_entry_set_ipv6_tuple(struct
323 return 0;
324 }
325
326 -int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port)
327 +int mtk_foe_entry_set_dsa(struct mtk_eth *eth, struct mtk_foe_entry *entry,
328 + int port)
329 {
330 - struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
331 + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry);
332
333 l2->etype = BIT(port);
334
335 - if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER))
336 - entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
337 + if (!(entry->ib1 & mtk_get_ib1_vlan_layer_mask(eth)))
338 + entry->ib1 |= mtk_prep_ib1_vlan_layer(eth, 1);
339 else
340 l2->etype |= BIT(8);
341
342 - entry->ib1 &= ~MTK_FOE_IB1_BIND_VLAN_TAG;
343 + entry->ib1 &= ~mtk_get_ib1_vlan_tag_mask(eth);
344
345 return 0;
346 }
347
348 -int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid)
349 +int mtk_foe_entry_set_vlan(struct mtk_eth *eth, struct mtk_foe_entry *entry,
350 + int vid)
351 {
352 - struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
353 + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry);
354
355 - switch (FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, entry->ib1)) {
356 + switch (mtk_prep_ib1_vlan_layer(eth, entry->ib1)) {
357 case 0:
358 - entry->ib1 |= MTK_FOE_IB1_BIND_VLAN_TAG |
359 - FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
360 + entry->ib1 |= mtk_get_ib1_vlan_tag_mask(eth) |
361 + mtk_prep_ib1_vlan_layer(eth, 1);
362 l2->vlan1 = vid;
363 return 0;
364 case 1:
365 - if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG)) {
366 + if (!(entry->ib1 & mtk_get_ib1_vlan_tag_mask(eth))) {
367 l2->vlan1 = vid;
368 l2->etype |= BIT(8);
369 } else {
370 l2->vlan2 = vid;
371 - entry->ib1 += FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, 1);
372 + entry->ib1 += mtk_prep_ib1_vlan_layer(eth, 1);
373 }
374 return 0;
375 default:
376 @@ -337,34 +357,42 @@ int mtk_foe_entry_set_vlan(struct mtk_fo
377 }
378 }
379
380 -int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid)
381 +int mtk_foe_entry_set_pppoe(struct mtk_eth *eth, struct mtk_foe_entry *entry,
382 + int sid)
383 {
384 - struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
385 + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry);
386
387 - if (!(entry->ib1 & MTK_FOE_IB1_BIND_VLAN_LAYER) ||
388 - (entry->ib1 & MTK_FOE_IB1_BIND_VLAN_TAG))
389 + if (!(entry->ib1 & mtk_get_ib1_vlan_layer_mask(eth)) ||
390 + (entry->ib1 & mtk_get_ib1_vlan_tag_mask(eth)))
391 l2->etype = ETH_P_PPP_SES;
392
393 - entry->ib1 |= MTK_FOE_IB1_BIND_PPPOE;
394 + entry->ib1 |= mtk_get_ib1_ppoe_mask(eth);
395 l2->pppoe_id = sid;
396
397 return 0;
398 }
399
400 -int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
401 - int bss, int wcid)
402 +int mtk_foe_entry_set_wdma(struct mtk_eth *eth, struct mtk_foe_entry *entry,
403 + int wdma_idx, int txq, int bss, int wcid)
404 {
405 - struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
406 - u32 *ib2 = mtk_foe_entry_ib2(entry);
407 + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry);
408 + u32 *ib2 = mtk_foe_entry_ib2(eth, entry);
409
410 - *ib2 &= ~MTK_FOE_IB2_PORT_MG;
411 - *ib2 |= MTK_FOE_IB2_WDMA_WINFO;
412 - if (wdma_idx)
413 - *ib2 |= MTK_FOE_IB2_WDMA_DEVIDX;
414 -
415 - l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) |
416 - FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) |
417 - FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq);
418 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
419 + *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2;
420 + *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) |
421 + MTK_FOE_IB2_WDMA_WINFO_V2;
422 + l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) |
423 + FIELD_PREP(MTK_FOE_WINFO_BSS, bss);
424 + } else {
425 + *ib2 &= ~MTK_FOE_IB2_PORT_MG;
426 + *ib2 |= MTK_FOE_IB2_WDMA_WINFO;
427 + if (wdma_idx)
428 + *ib2 |= MTK_FOE_IB2_WDMA_DEVIDX;
429 + l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) |
430 + FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) |
431 + FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq);
432 + }
433
434 return 0;
435 }
436 @@ -376,14 +404,15 @@ static inline bool mtk_foe_entry_usable(
437 }
438
439 static bool
440 -mtk_flow_entry_match(struct mtk_flow_entry *entry, struct mtk_foe_entry *data)
441 +mtk_flow_entry_match(struct mtk_eth *eth, struct mtk_flow_entry *entry,
442 + struct mtk_foe_entry *data)
443 {
444 int type, len;
445
446 if ((data->ib1 ^ entry->data.ib1) & MTK_FOE_IB1_UDP)
447 return false;
448
449 - type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->data.ib1);
450 + type = mtk_get_ib1_pkt_type(eth, entry->data.ib1);
451 if (type > MTK_PPE_PKT_TYPE_IPV4_DSLITE)
452 len = offsetof(struct mtk_foe_entry, ipv6._rsv);
453 else
454 @@ -427,14 +456,12 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp
455
456 static int __mtk_foe_entry_idle_time(struct mtk_ppe *ppe, u32 ib1)
457 {
458 - u16 timestamp;
459 - u16 now;
460 -
461 - now = mtk_eth_timestamp(ppe->eth) & MTK_FOE_IB1_BIND_TIMESTAMP;
462 - timestamp = ib1 & MTK_FOE_IB1_BIND_TIMESTAMP;
463 + u32 ib1_ts_mask = mtk_get_ib1_ts_mask(ppe->eth);
464 + u16 now = mtk_eth_timestamp(ppe->eth);
465 + u16 timestamp = ib1 & ib1_ts_mask;
466
467 if (timestamp > now)
468 - return MTK_FOE_IB1_BIND_TIMESTAMP + 1 - timestamp + now;
469 + return ib1_ts_mask + 1 - timestamp + now;
470 else
471 return now - timestamp;
472 }
473 @@ -442,6 +469,7 @@ static int __mtk_foe_entry_idle_time(str
474 static void
475 mtk_flow_entry_update_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
476 {
477 + u32 ib1_ts_mask = mtk_get_ib1_ts_mask(ppe->eth);
478 struct mtk_flow_entry *cur;
479 struct mtk_foe_entry *hwe;
480 struct hlist_node *tmp;
481 @@ -466,8 +494,8 @@ mtk_flow_entry_update_l2(struct mtk_ppe
482 continue;
483
484 idle = cur_idle;
485 - entry->data.ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP;
486 - entry->data.ib1 |= hwe->ib1 & MTK_FOE_IB1_BIND_TIMESTAMP;
487 + entry->data.ib1 &= ~ib1_ts_mask;
488 + entry->data.ib1 |= hwe->ib1 & ib1_ts_mask;
489 }
490 }
491
492 @@ -489,7 +517,7 @@ mtk_flow_entry_update(struct mtk_ppe *pp
493
494 hwe = mtk_foe_get_entry(ppe, entry->hash);
495 memcpy(&foe, hwe, ppe->eth->soc->foe_entry_size);
496 - if (!mtk_flow_entry_match(entry, &foe)) {
497 + if (!mtk_flow_entry_match(ppe->eth, entry, &foe)) {
498 entry->hash = 0xffff;
499 goto out;
500 }
501 @@ -504,16 +532,22 @@ static void
502 __mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_foe_entry *entry,
503 u16 hash)
504 {
505 + struct mtk_eth *eth = ppe->eth;
506 + u16 timestamp = mtk_eth_timestamp(eth);
507 struct mtk_foe_entry *hwe;
508 - u16 timestamp;
509
510 - timestamp = mtk_eth_timestamp(ppe->eth);
511 - timestamp &= MTK_FOE_IB1_BIND_TIMESTAMP;
512 - entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP;
513 - entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP, timestamp);
514 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
515 + entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2;
516 + entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP_V2,
517 + timestamp);
518 + } else {
519 + entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP;
520 + entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP,
521 + timestamp);
522 + }
523
524 hwe = mtk_foe_get_entry(ppe, hash);
525 - memcpy(&hwe->data, &entry->data, ppe->eth->soc->foe_entry_size);
526 + memcpy(&hwe->data, &entry->data, eth->soc->foe_entry_size);
527 wmb();
528 hwe->ib1 = entry->ib1;
529
530 @@ -540,8 +574,8 @@ mtk_foe_entry_commit_l2(struct mtk_ppe *
531
532 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
533 {
534 - int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->data.ib1);
535 const struct mtk_soc_data *soc = ppe->eth->soc;
536 + int type = mtk_get_ib1_pkt_type(ppe->eth, entry->data.ib1);
537 u32 hash;
538
539 if (type == MTK_PPE_PKT_TYPE_BRIDGE)
540 @@ -564,7 +598,7 @@ mtk_foe_entry_commit_subflow(struct mtk_
541 struct mtk_flow_entry *flow_info;
542 struct mtk_foe_entry foe = {}, *hwe;
543 struct mtk_foe_mac_info *l2;
544 - u32 ib1_mask = MTK_FOE_IB1_PACKET_TYPE | MTK_FOE_IB1_UDP;
545 + u32 ib1_mask = mtk_get_ib1_pkt_type_mask(ppe->eth) | MTK_FOE_IB1_UDP;
546 int type;
547
548 flow_info = kzalloc(offsetof(struct mtk_flow_entry, l2_data.end),
549 @@ -584,16 +618,16 @@ mtk_foe_entry_commit_subflow(struct mtk_
550 foe.ib1 &= ib1_mask;
551 foe.ib1 |= entry->data.ib1 & ~ib1_mask;
552
553 - l2 = mtk_foe_entry_l2(&foe);
554 + l2 = mtk_foe_entry_l2(ppe->eth, &foe);
555 memcpy(l2, &entry->data.bridge.l2, sizeof(*l2));
556
557 - type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, foe.ib1);
558 + type = mtk_get_ib1_pkt_type(ppe->eth, foe.ib1);
559 if (type == MTK_PPE_PKT_TYPE_IPV4_HNAPT)
560 memcpy(&foe.ipv4.new, &foe.ipv4.orig, sizeof(foe.ipv4.new));
561 else if (type >= MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T && l2->etype == ETH_P_IP)
562 l2->etype = ETH_P_IPV6;
563
564 - *mtk_foe_entry_ib2(&foe) = entry->data.bridge.ib2;
565 + *mtk_foe_entry_ib2(ppe->eth, &foe) = entry->data.bridge.ib2;
566
567 __mtk_foe_entry_commit(ppe, &foe, hash);
568 }
569 @@ -626,7 +660,7 @@ void __mtk_ppe_check_skb(struct mtk_ppe
570 continue;
571 }
572
573 - if (found || !mtk_flow_entry_match(entry, hwe)) {
574 + if (found || !mtk_flow_entry_match(ppe->eth, entry, hwe)) {
575 if (entry->hash != 0xffff)
576 entry->hash = 0xffff;
577 continue;
578 @@ -771,6 +805,8 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
579 MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
580 FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
581 MTK_PPE_ENTRIES_SHIFT);
582 + if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2))
583 + val |= MTK_PPE_TB_CFG_INFO_SEL;
584 ppe_w32(ppe, MTK_PPE_TB_CFG, val);
585
586 ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK,
587 @@ -778,15 +814,21 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
588
589 mtk_ppe_cache_enable(ppe, true);
590
591 - val = MTK_PPE_FLOW_CFG_IP4_TCP_FRAG |
592 - MTK_PPE_FLOW_CFG_IP4_UDP_FRAG |
593 - MTK_PPE_FLOW_CFG_IP6_3T_ROUTE |
594 + val = MTK_PPE_FLOW_CFG_IP6_3T_ROUTE |
595 MTK_PPE_FLOW_CFG_IP6_5T_ROUTE |
596 MTK_PPE_FLOW_CFG_IP6_6RD |
597 MTK_PPE_FLOW_CFG_IP4_NAT |
598 MTK_PPE_FLOW_CFG_IP4_NAPT |
599 MTK_PPE_FLOW_CFG_IP4_DSLITE |
600 MTK_PPE_FLOW_CFG_IP4_NAT_FRAG;
601 + if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2))
602 + val |= MTK_PPE_MD_TOAP_BYP_CRSN0 |
603 + MTK_PPE_MD_TOAP_BYP_CRSN1 |
604 + MTK_PPE_MD_TOAP_BYP_CRSN2 |
605 + MTK_PPE_FLOW_CFG_IP4_HASH_GRE_KEY;
606 + else
607 + val |= MTK_PPE_FLOW_CFG_IP4_TCP_FRAG |
608 + MTK_PPE_FLOW_CFG_IP4_UDP_FRAG;
609 ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);
610
611 val = FIELD_PREP(MTK_PPE_UNBIND_AGE_MIN_PACKETS, 1000) |
612 @@ -820,6 +862,11 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
613 ppe_w32(ppe, MTK_PPE_GLO_CFG, val);
614
615 ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
616 +
617 + if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) {
618 + ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777);
619 + ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f);
620 + }
621 }
622
623 int mtk_ppe_stop(struct mtk_ppe *ppe)
624 --- a/drivers/net/ethernet/mediatek/mtk_ppe.h
625 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
626 @@ -32,6 +32,15 @@
627 #define MTK_FOE_IB1_UDP BIT(30)
628 #define MTK_FOE_IB1_STATIC BIT(31)
629
630 +/* CONFIG_MEDIATEK_NETSYS_V2 */
631 +#define MTK_FOE_IB1_BIND_TIMESTAMP_V2 GENMASK(7, 0)
632 +#define MTK_FOE_IB1_BIND_VLAN_LAYER_V2 GENMASK(16, 14)
633 +#define MTK_FOE_IB1_BIND_PPPOE_V2 BIT(17)
634 +#define MTK_FOE_IB1_BIND_VLAN_TAG_V2 BIT(18)
635 +#define MTK_FOE_IB1_BIND_CACHE_V2 BIT(20)
636 +#define MTK_FOE_IB1_BIND_TTL_V2 BIT(22)
637 +#define MTK_FOE_IB1_PACKET_TYPE_V2 GENMASK(27, 23)
638 +
639 enum {
640 MTK_PPE_PKT_TYPE_IPV4_HNAPT = 0,
641 MTK_PPE_PKT_TYPE_IPV4_ROUTE = 1,
642 @@ -53,14 +62,25 @@ enum {
643
644 #define MTK_FOE_IB2_PORT_MG GENMASK(17, 12)
645
646 +#define MTK_FOE_IB2_RX_IDX GENMASK(18, 17)
647 #define MTK_FOE_IB2_PORT_AG GENMASK(23, 18)
648
649 #define MTK_FOE_IB2_DSCP GENMASK(31, 24)
650
651 +/* CONFIG_MEDIATEK_NETSYS_V2 */
652 +#define MTK_FOE_IB2_PORT_MG_V2 BIT(7)
653 +#define MTK_FOE_IB2_DEST_PORT_V2 GENMASK(12, 9)
654 +#define MTK_FOE_IB2_MULTICAST_V2 BIT(13)
655 +#define MTK_FOE_IB2_WDMA_WINFO_V2 BIT(19)
656 +#define MTK_FOE_IB2_PORT_AG_V2 GENMASK(23, 20)
657 +
658 #define MTK_FOE_VLAN2_WINFO_BSS GENMASK(5, 0)
659 #define MTK_FOE_VLAN2_WINFO_WCID GENMASK(13, 6)
660 #define MTK_FOE_VLAN2_WINFO_RING GENMASK(15, 14)
661
662 +#define MTK_FOE_WINFO_BSS GENMASK(5, 0)
663 +#define MTK_FOE_WINFO_WCID GENMASK(15, 6)
664 +
665 enum {
666 MTK_FOE_STATE_INVALID,
667 MTK_FOE_STATE_UNBIND,
668 @@ -81,6 +101,9 @@ struct mtk_foe_mac_info {
669
670 u16 pppoe_id;
671 u16 src_mac_lo;
672 +
673 + u16 minfo;
674 + u16 winfo;
675 };
676
677 /* software-only entry type */
678 @@ -198,7 +221,7 @@ struct mtk_foe_entry {
679 struct mtk_foe_ipv4_dslite dslite;
680 struct mtk_foe_ipv6 ipv6;
681 struct mtk_foe_ipv6_6rd ipv6_6rd;
682 - u32 data[19];
683 + u32 data[23];
684 };
685 };
686
687 @@ -306,20 +329,27 @@ mtk_ppe_check_skb(struct mtk_ppe *ppe, s
688 __mtk_ppe_check_skb(ppe, skb, hash);
689 }
690
691 -int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
692 - u8 pse_port, u8 *src_mac, u8 *dest_mac);
693 -int mtk_foe_entry_set_pse_port(struct mtk_foe_entry *entry, u8 port);
694 -int mtk_foe_entry_set_ipv4_tuple(struct mtk_foe_entry *entry, bool orig,
695 +int mtk_foe_entry_prepare(struct mtk_eth *eth, struct mtk_foe_entry *entry,
696 + int type, int l4proto, u8 pse_port, u8 *src_mac,
697 + u8 *dest_mac);
698 +int mtk_foe_entry_set_pse_port(struct mtk_eth *eth,
699 + struct mtk_foe_entry *entry, u8 port);
700 +int mtk_foe_entry_set_ipv4_tuple(struct mtk_eth *eth,
701 + struct mtk_foe_entry *entry, bool orig,
702 __be32 src_addr, __be16 src_port,
703 __be32 dest_addr, __be16 dest_port);
704 -int mtk_foe_entry_set_ipv6_tuple(struct mtk_foe_entry *entry,
705 +int mtk_foe_entry_set_ipv6_tuple(struct mtk_eth *eth,
706 + struct mtk_foe_entry *entry,
707 __be32 *src_addr, __be16 src_port,
708 __be32 *dest_addr, __be16 dest_port);
709 -int mtk_foe_entry_set_dsa(struct mtk_foe_entry *entry, int port);
710 -int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid);
711 -int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid);
712 -int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
713 - int bss, int wcid);
714 +int mtk_foe_entry_set_dsa(struct mtk_eth *eth, struct mtk_foe_entry *entry,
715 + int port);
716 +int mtk_foe_entry_set_vlan(struct mtk_eth *eth, struct mtk_foe_entry *entry,
717 + int vid);
718 +int mtk_foe_entry_set_pppoe(struct mtk_eth *eth, struct mtk_foe_entry *entry,
719 + int sid);
720 +int mtk_foe_entry_set_wdma(struct mtk_eth *eth, struct mtk_foe_entry *entry,
721 + int wdma_idx, int txq, int bss, int wcid);
722 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
723 void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
724 int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
725 --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
726 +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
727 @@ -52,18 +52,19 @@ static const struct rhashtable_params mt
728 };
729
730 static int
731 -mtk_flow_set_ipv4_addr(struct mtk_foe_entry *foe, struct mtk_flow_data *data,
732 - bool egress)
733 +mtk_flow_set_ipv4_addr(struct mtk_eth *eth, struct mtk_foe_entry *foe,
734 + struct mtk_flow_data *data, bool egress)
735 {
736 - return mtk_foe_entry_set_ipv4_tuple(foe, egress,
737 + return mtk_foe_entry_set_ipv4_tuple(eth, foe, egress,
738 data->v4.src_addr, data->src_port,
739 data->v4.dst_addr, data->dst_port);
740 }
741
742 static int
743 -mtk_flow_set_ipv6_addr(struct mtk_foe_entry *foe, struct mtk_flow_data *data)
744 +mtk_flow_set_ipv6_addr(struct mtk_eth *eth, struct mtk_foe_entry *foe,
745 + struct mtk_flow_data *data)
746 {
747 - return mtk_foe_entry_set_ipv6_tuple(foe,
748 + return mtk_foe_entry_set_ipv6_tuple(eth, foe,
749 data->v6.src_addr.s6_addr32, data->src_port,
750 data->v6.dst_addr.s6_addr32, data->dst_port);
751 }
752 @@ -190,16 +191,29 @@ mtk_flow_set_output_device(struct mtk_et
753 int pse_port, dsa_port;
754
755 if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
756 - mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
757 - info.wcid);
758 - pse_port = 3;
759 + mtk_foe_entry_set_wdma(eth, foe, info.wdma_idx, info.queue,
760 + info.bss, info.wcid);
761 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
762 + switch (info.wdma_idx) {
763 + case 0:
764 + pse_port = 8;
765 + break;
766 + case 1:
767 + pse_port = 9;
768 + break;
769 + default:
770 + return -EINVAL;
771 + }
772 + } else {
773 + pse_port = 3;
774 + }
775 *wed_index = info.wdma_idx;
776 goto out;
777 }
778
779 dsa_port = mtk_flow_get_dsa_port(&dev);
780 if (dsa_port >= 0)
781 - mtk_foe_entry_set_dsa(foe, dsa_port);
782 + mtk_foe_entry_set_dsa(eth, foe, dsa_port);
783
784 if (dev == eth->netdev[0])
785 pse_port = 1;
786 @@ -209,7 +223,7 @@ mtk_flow_set_output_device(struct mtk_et
787 return -EOPNOTSUPP;
788
789 out:
790 - mtk_foe_entry_set_pse_port(foe, pse_port);
791 + mtk_foe_entry_set_pse_port(eth, foe, pse_port);
792
793 return 0;
794 }
795 @@ -333,9 +347,8 @@ mtk_flow_offload_replace(struct mtk_eth
796 !is_valid_ether_addr(data.eth.h_dest))
797 return -EINVAL;
798
799 - err = mtk_foe_entry_prepare(&foe, offload_type, l4proto, 0,
800 - data.eth.h_source,
801 - data.eth.h_dest);
802 + err = mtk_foe_entry_prepare(eth, &foe, offload_type, l4proto, 0,
803 + data.eth.h_source, data.eth.h_dest);
804 if (err)
805 return err;
806
807 @@ -360,7 +373,7 @@ mtk_flow_offload_replace(struct mtk_eth
808 data.v4.src_addr = addrs.key->src;
809 data.v4.dst_addr = addrs.key->dst;
810
811 - mtk_flow_set_ipv4_addr(&foe, &data, false);
812 + mtk_flow_set_ipv4_addr(eth, &foe, &data, false);
813 }
814
815 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
816 @@ -371,7 +384,7 @@ mtk_flow_offload_replace(struct mtk_eth
817 data.v6.src_addr = addrs.key->src;
818 data.v6.dst_addr = addrs.key->dst;
819
820 - mtk_flow_set_ipv6_addr(&foe, &data);
821 + mtk_flow_set_ipv6_addr(eth, &foe, &data);
822 }
823
824 flow_action_for_each(i, act, &rule->action) {
825 @@ -401,7 +414,7 @@ mtk_flow_offload_replace(struct mtk_eth
826 }
827
828 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
829 - err = mtk_flow_set_ipv4_addr(&foe, &data, true);
830 + err = mtk_flow_set_ipv4_addr(eth, &foe, &data, true);
831 if (err)
832 return err;
833 }
834 @@ -413,10 +426,10 @@ mtk_flow_offload_replace(struct mtk_eth
835 if (data.vlan.proto != htons(ETH_P_8021Q))
836 return -EOPNOTSUPP;
837
838 - mtk_foe_entry_set_vlan(&foe, data.vlan.id);
839 + mtk_foe_entry_set_vlan(eth, &foe, data.vlan.id);
840 }
841 if (data.pppoe.num == 1)
842 - mtk_foe_entry_set_pppoe(&foe, data.pppoe.sid);
843 + mtk_foe_entry_set_pppoe(eth, &foe, data.pppoe.sid);
844
845 err = mtk_flow_set_output_device(eth, &foe, odev, data.eth.h_dest,
846 &wed_index);
847 --- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
848 +++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h
849 @@ -21,6 +21,9 @@
850 #define MTK_PPE_GLO_CFG_BUSY BIT(31)
851
852 #define MTK_PPE_FLOW_CFG 0x204
853 +#define MTK_PPE_MD_TOAP_BYP_CRSN0 BIT(1)
854 +#define MTK_PPE_MD_TOAP_BYP_CRSN1 BIT(2)
855 +#define MTK_PPE_MD_TOAP_BYP_CRSN2 BIT(3)
856 #define MTK_PPE_FLOW_CFG_IP4_TCP_FRAG BIT(6)
857 #define MTK_PPE_FLOW_CFG_IP4_UDP_FRAG BIT(7)
858 #define MTK_PPE_FLOW_CFG_IP6_3T_ROUTE BIT(8)
859 @@ -54,6 +57,7 @@
860 #define MTK_PPE_TB_CFG_HASH_MODE GENMASK(15, 14)
861 #define MTK_PPE_TB_CFG_SCAN_MODE GENMASK(17, 16)
862 #define MTK_PPE_TB_CFG_HASH_DEBUG GENMASK(19, 18)
863 +#define MTK_PPE_TB_CFG_INFO_SEL BIT(20)
864
865 enum {
866 MTK_PPE_SCAN_MODE_DISABLED,
867 @@ -112,6 +116,8 @@ enum {
868 #define MTK_PPE_DEFAULT_CPU_PORT 0x248
869 #define MTK_PPE_DEFAULT_CPU_PORT_MASK(_n) (GENMASK(2, 0) << ((_n) * 4))
870
871 +#define MTK_PPE_DEFAULT_CPU_PORT1 0x24c
872 +
873 #define MTK_PPE_MTU_DROP 0x308
874
875 #define MTK_PPE_VLAN_MTU0 0x30c
876 @@ -141,4 +147,6 @@ enum {
877 #define MTK_PPE_MIB_CACHE_CTL_EN BIT(0)
878 #define MTK_PPE_MIB_CACHE_CTL_FLUSH BIT(2)
879
880 +#define MTK_PPE_SBW_CTRL 0x374
881 +
882 #endif