506b0cc5d8b5ceb97e2d2bf10d6bdacf5d3db6d2
[openwrt/staging/ldir.git] /
1 From 60b7ddb0b3c9d906a20d8a84e527ccf5a792a64b Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Thu, 2 Dec 2021 17:04:18 +0100
4 Subject: [PATCH] drm/vc4: hdmi: Move clock calculation into its own
5 function
6
7 The code to compute our clock rate for a given setup will be called in
8 multiple places in the next patches, so let's create a separate function
9 for it.
10
11 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
12 ---
13 drivers/gpu/drm/vc4/vc4_hdmi.c | 49 +++++++++++++++++++++++-----------
14 1 file changed, 34 insertions(+), 15 deletions(-)
15
16 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
17 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
18 @@ -1263,6 +1263,35 @@ vc4_hdmi_encoder_clock_valid(const struc
19 return MODE_OK;
20 }
21
22 +static unsigned long long
23 +vc4_hdmi_encoder_compute_mode_clock(const struct drm_display_mode *mode,
24 + unsigned int bpc)
25 +{
26 + unsigned long long clock = mode->crtc_clock * 1000;
27 +
28 + if (mode->flags & DRM_MODE_FLAG_DBLCLK)
29 + clock = clock * 2;
30 +
31 + return clock * bpc / 8;
32 +}
33 +
34 +static int
35 +vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
36 + struct vc4_hdmi_connector_state *vc4_state,
37 + const struct drm_display_mode *mode,
38 + unsigned int bpc)
39 +{
40 + unsigned long long clock;
41 +
42 + clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc);
43 + if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
44 + return -EINVAL;
45 +
46 + vc4_state->pixel_rate = clock;
47 +
48 + return 0;
49 +}
50 +
51 #define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
52 #define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
53
54 @@ -1275,6 +1304,7 @@ static int vc4_hdmi_encoder_atomic_check
55 struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
56 unsigned long long pixel_rate = mode->clock * 1000;
57 unsigned long long tmds_rate;
58 + int ret;
59
60 if (vc4_hdmi->variant->unsupported_odd_h_timings &&
61 !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
62 @@ -1296,21 +1326,10 @@ static int vc4_hdmi_encoder_atomic_check
63 pixel_rate = mode->clock * 1000;
64 }
65
66 - if (conn_state->max_bpc == 12) {
67 - pixel_rate = pixel_rate * 150;
68 - do_div(pixel_rate, 100);
69 - } else if (conn_state->max_bpc == 10) {
70 - pixel_rate = pixel_rate * 125;
71 - do_div(pixel_rate, 100);
72 - }
73 -
74 - if (mode->flags & DRM_MODE_FLAG_DBLCLK)
75 - pixel_rate = pixel_rate * 2;
76 -
77 - if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, pixel_rate) != MODE_OK)
78 - return -EINVAL;
79 -
80 - vc4_state->pixel_rate = pixel_rate;
81 + ret = vc4_hdmi_encoder_compute_clock(vc4_hdmi, vc4_state, mode,
82 + conn_state->max_bpc);
83 + if (ret)
84 + return ret;
85
86 return 0;
87 }