506966f1af57a6c1f02bdb5b22a9676907928b61
[openwrt/staging/neocturne.git] /
1 From aaf421425cbdec4eb6fd75a29e65c2867b0b7bbd Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Fri, 14 May 2021 22:59:57 +0200
4 Subject: [PATCH] net: dsa: qca8k: handle error with qca8k_rmw operation
5
6 qca8k_rmw can fail. Rework any user to handle error values and
7 correctly return. Change qca8k_rmw to return the error code or 0 instead
8 of the reg value. The reg returned by qca8k_rmw wasn't used anywhere,
9 so this doesn't cause any functional change.
10
11 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
12 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
13 Signed-off-by: David S. Miller <davem@davemloft.net>
14 ---
15 drivers/net/dsa/qca8k.c | 133 +++++++++++++++++++++++++---------------
16 1 file changed, 83 insertions(+), 50 deletions(-)
17
18 --- a/drivers/net/dsa/qca8k.c
19 +++ b/drivers/net/dsa/qca8k.c
20 @@ -190,12 +190,13 @@ exit:
21 return ret;
22 }
23
24 -static u32
25 -qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 val)
26 +static int
27 +qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val)
28 {
29 struct mii_bus *bus = priv->bus;
30 u16 r1, r2, page;
31 - u32 ret;
32 + u32 val;
33 + int ret;
34
35 qca8k_split_addr(reg, &r1, &r2, &page);
36
37 @@ -205,10 +206,15 @@ qca8k_rmw(struct qca8k_priv *priv, u32 r
38 if (ret < 0)
39 goto exit;
40
41 - ret = qca8k_mii_read32(bus, 0x10 | r2, r1);
42 - ret &= ~mask;
43 - ret |= val;
44 - qca8k_mii_write32(bus, 0x10 | r2, r1, ret);
45 + val = qca8k_mii_read32(bus, 0x10 | r2, r1);
46 + if (val < 0) {
47 + ret = val;
48 + goto exit;
49 + }
50 +
51 + val &= ~mask;
52 + val |= write_val;
53 + qca8k_mii_write32(bus, 0x10 | r2, r1, val);
54
55 exit:
56 mutex_unlock(&bus->mdio_lock);
57 @@ -216,16 +222,16 @@ exit:
58 return ret;
59 }
60
61 -static void
62 +static int
63 qca8k_reg_set(struct qca8k_priv *priv, u32 reg, u32 val)
64 {
65 - qca8k_rmw(priv, reg, 0, val);
66 + return qca8k_rmw(priv, reg, 0, val);
67 }
68
69 -static void
70 +static int
71 qca8k_reg_clear(struct qca8k_priv *priv, u32 reg, u32 val)
72 {
73 - qca8k_rmw(priv, reg, val, 0);
74 + return qca8k_rmw(priv, reg, val, 0);
75 }
76
77 static int
78 @@ -570,12 +576,19 @@ qca8k_mib_init(struct qca8k_priv *priv)
79 int ret;
80
81 mutex_lock(&priv->reg_mutex);
82 - qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QCA8K_MIB_BUSY);
83 + ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QCA8K_MIB_BUSY);
84 + if (ret)
85 + goto exit;
86 +
87 qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY);
88 - qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);
89 +
90 + ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);
91 + if (ret)
92 + goto exit;
93
94 ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);
95
96 +exit:
97 mutex_unlock(&priv->reg_mutex);
98 return ret;
99 }
100 @@ -747,9 +760,8 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
101 * a dt-overlay and driver reload changed the configuration
102 */
103
104 - qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL,
105 - QCA8K_MDIO_MASTER_EN);
106 - return 0;
107 + return qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL,
108 + QCA8K_MDIO_MASTER_EN);
109 }
110
111 priv->ops.phy_read = qca8k_phy_read;
112 @@ -782,8 +794,12 @@ qca8k_setup(struct dsa_switch *ds)
113 return ret;
114
115 /* Enable CPU Port */
116 - qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
117 - QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
118 + ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
119 + QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
120 + if (ret) {
121 + dev_err(priv->dev, "failed enabling CPU port");
122 + return ret;
123 + }
124
125 /* Enable MIB counters */
126 ret = qca8k_mib_init(priv);
127 @@ -800,9 +816,12 @@ qca8k_setup(struct dsa_switch *ds)
128 }
129
130 /* Disable forwarding by default on all ports */
131 - for (i = 0; i < QCA8K_NUM_PORTS; i++)
132 - qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
133 - QCA8K_PORT_LOOKUP_MEMBER, 0);
134 + for (i = 0; i < QCA8K_NUM_PORTS; i++) {
135 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
136 + QCA8K_PORT_LOOKUP_MEMBER, 0);
137 + if (ret)
138 + return ret;
139 + }
140
141 /* Disable MAC by default on all ports */
142 for (i = 1; i < QCA8K_NUM_PORTS; i++)
143 @@ -821,28 +840,37 @@ qca8k_setup(struct dsa_switch *ds)
144 for (i = 0; i < QCA8K_NUM_PORTS; i++) {
145 /* CPU port gets connected to all user ports of the switch */
146 if (dsa_is_cpu_port(ds, i)) {
147 - qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
148 - QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
149 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
150 + QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
151 + if (ret)
152 + return ret;
153 }
154
155 /* Individual user ports get connected to CPU port only */
156 if (dsa_is_user_port(ds, i)) {
157 int shift = 16 * (i % 2);
158
159 - qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
160 - QCA8K_PORT_LOOKUP_MEMBER,
161 - BIT(QCA8K_CPU_PORT));
162 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
163 + QCA8K_PORT_LOOKUP_MEMBER,
164 + BIT(QCA8K_CPU_PORT));
165 + if (ret)
166 + return ret;
167
168 /* Enable ARP Auto-learning by default */
169 - qca8k_reg_set(priv, QCA8K_PORT_LOOKUP_CTRL(i),
170 - QCA8K_PORT_LOOKUP_LEARN);
171 + ret = qca8k_reg_set(priv, QCA8K_PORT_LOOKUP_CTRL(i),
172 + QCA8K_PORT_LOOKUP_LEARN);
173 + if (ret)
174 + return ret;
175
176 /* For port based vlans to work we need to set the
177 * default egress vid
178 */
179 - qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i),
180 - 0xfff << shift,
181 - QCA8K_PORT_VID_DEF << shift);
182 + ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i),
183 + 0xfff << shift,
184 + QCA8K_PORT_VID_DEF << shift);
185 + if (ret)
186 + return ret;
187 +
188 ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i),
189 QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |
190 QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));
191 @@ -1234,7 +1262,7 @@ qca8k_port_bridge_join(struct dsa_switch
192 {
193 struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
194 int port_mask = BIT(QCA8K_CPU_PORT);
195 - int i;
196 + int i, ret;
197
198 for (i = 1; i < QCA8K_NUM_PORTS; i++) {
199 if (dsa_to_port(ds, i)->bridge_dev != br)
200 @@ -1242,17 +1270,20 @@ qca8k_port_bridge_join(struct dsa_switch
201 /* Add this port to the portvlan mask of the other ports
202 * in the bridge
203 */
204 - qca8k_reg_set(priv,
205 - QCA8K_PORT_LOOKUP_CTRL(i),
206 - BIT(port));
207 + ret = qca8k_reg_set(priv,
208 + QCA8K_PORT_LOOKUP_CTRL(i),
209 + BIT(port));
210 + if (ret)
211 + return ret;
212 if (i != port)
213 port_mask |= BIT(i);
214 }
215 +
216 /* Add all other ports to this ports portvlan mask */
217 - qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
218 - QCA8K_PORT_LOOKUP_MEMBER, port_mask);
219 + ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
220 + QCA8K_PORT_LOOKUP_MEMBER, port_mask);
221
222 - return 0;
223 + return ret;
224 }
225
226 static void