git.openwrt.org Git - openwrt/staging/wigyori.git/blob

   1 From 3757223c3354b9feeffcbe916eb18eb8873bd133 Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Wed, 3 Mar 2021 10:48:53 +0800
   4 Subject: [PATCH 07/12] board: mt7629: add support for booting from SPI-NAND
   5
   6 Add support for mt7629 to boot from SPI-NAND.
   7 Add a new defconfig for mt7629+spi-nand configuration.
   8
   9 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  10 ---
  11  arch/arm/dts/mt7629-rfb-u-boot.dtsi |   8 ++
  12  arch/arm/dts/mt7629-rfb.dts         |  10 +++
  13  arch/arm/dts/mt7629.dtsi            |  16 ++++
  14  board/mediatek/mt7629/Kconfig       |  35 ++++++++-
  15  configs/mt7629_nand_rfb_defconfig   | 111 ++++++++++++++++++++++++++++
  16  include/configs/mt7629.h            |   7 ++
  17  6 files changed, 186 insertions(+), 1 deletion(-)
  18  create mode 100644 configs/mt7629_nand_rfb_defconfig
  19
  20 --- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi
  21 +++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi
  22 @@ -40,3 +40,11 @@
  23  &snfi {
  24         u-boot,dm-pre-reloc;
  25  };
  26 +
  27 +&pinctrl {
  28 +       u-boot,dm-pre-reloc;
  29 +};
  30 +
  31 +&snand {
  32 +       u-boot,dm-pre-reloc;
  33 +};
  34 --- a/arch/arm/dts/mt7629-rfb.dts
  35 +++ b/arch/arm/dts/mt7629-rfb.dts
  36 @@ -47,9 +47,12 @@
  37         };
  38
  39         snfi_pins: snfi-pins {
  40 +               u-boot,dm-pre-reloc;
  41 +
  42                 mux {
  43                         function = "flash";
  44                         groups = "snfi";
  45 +                       u-boot,dm-pre-reloc;
  46                 };
  47         };
  48
  49 @@ -102,6 +105,13 @@
  50         };
  51  };
  52
  53 +&snand {
  54 +       pinctrl-names = "default";
  55 +       pinctrl-0 = <&snfi_pins>;
  56 +       status = "okay";
  57 +       quad-spi;
  58 +};
  59 +
  60  &uart0 {
  61         pinctrl-names = "default";
  62         pinctrl-0 = <&uart0_pins>;
  63 --- a/arch/arm/dts/mt7629.dtsi
  64 +++ b/arch/arm/dts/mt7629.dtsi
  65 @@ -229,6 +229,22 @@
  66                 #size-cells = <0>;
  67         };
  68
  69 +       snand: snand@1100d000 {
  70 +               compatible = "mediatek,mt7629-snand";
  71 +               reg = <0x1100d000 0x1000>,
  72 +                     <0x1100e000 0x1000>;
  73 +               reg-names = "nfi", "ecc";
  74 +               clocks = <&pericfg CLK_PERI_NFI_PD>,
  75 +                        <&pericfg CLK_PERI_SNFI_PD>,
  76 +                        <&pericfg CLK_PERI_NFIECC_PD>;
  77 +               clock-names = "nfi_clk", "pad_clk", "ecc_clk";
  78 +               assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>,
  79 +                                 <&topckgen CLK_TOP_NFI_INFRA_SEL>;
  80 +               assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>,
  81 +                                        <&topckgen CLK_TOP_UNIVPLL2_D8>;
  82 +               status = "disabled";
  83 +       };
  84 +
  85         snor: snor@11014000 {
  86                 compatible = "mediatek,mtk-snor";
  87                 reg = <0x11014000 0x1000>;
  88 --- /dev/null
  89 +++ b/configs/mt7629_nand_rfb_defconfig
  90 @@ -0,0 +1,111 @@
  91 +CONFIG_ARM=y
  92 +CONFIG_SYS_ARCH_TIMER=y
  93 +CONFIG_SYS_THUMB_BUILD=y
  94 +CONFIG_ARCH_MEDIATEK=y
  95 +CONFIG_SYS_TEXT_BASE=0x41e00000
  96 +CONFIG_SYS_MALLOC_F_LEN=0x4000
  97 +CONFIG_NR_DRAM_BANKS=1
  98 +CONFIG_ENV_SIZE=0x20000
  99 +CONFIG_ENV_OFFSET=0x100000
 100 +CONFIG_SPL_TEXT_BASE=0x201000
 101 +CONFIG_TARGET_MT7629=y
 102 +CONFIG_BOOT_FROM_SNAND_2K_64=y
 103 +CONFIG_SPL_SERIAL_SUPPORT=y
 104 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 105 +CONFIG_SPL_STACK_R_ADDR=0x40800000
 106 +CONFIG_SPL_PAYLOAD="u-boot.img"
 107 +CONFIG_BUILD_TARGET="u-boot-mtk.bin"
 108 +CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
 109 +CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
 110 +CONFIG_FIT=y
 111 +CONFIG_FIT_VERBOSE=y
 112 +CONFIG_BOOTDELAY=3
 113 +CONFIG_DEFAULT_FDT_FILE="mt7629-rfb"
 114 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 115 +CONFIG_SYS_STDIO_DEREGISTER=y
 116 +# CONFIG_DISPLAY_BOARDINFO is not set
 117 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 118 +CONFIG_SPL_STACK_R=y
 119 +CONFIG_SPL_MTD_SUPPORT=y
 120 +CONFIG_SPL_NAND_SUPPORT=y
 121 +CONFIG_SPL_WATCHDOG_SUPPORT=y
 122 +CONFIG_HUSH_PARSER=y
 123 +CONFIG_SYS_PROMPT="U-Boot> "
 124 +CONFIG_CMD_BOOTMENU=y
 125 +# CONFIG_BOOTM_NETBSD is not set
 126 +# CONFIG_BOOTM_PLAN9 is not set
 127 +# CONFIG_BOOTM_RTEMS is not set
 128 +# CONFIG_BOOTM_VXWORKS is not set
 129 +# CONFIG_CMD_ELF is not set
 130 +# CONFIG_CMD_XIMG is not set
 131 +CONFIG_CMD_BIND=y
 132 +CONFIG_CMD_DM=y
 133 +# CONFIG_CMD_FLASH is not set
 134 +CONFIG_CMD_GPIO=y
 135 +CONFIG_CMD_MTD=y
 136 +CONFIG_CMD_USB=y
 137 +# CONFIG_CMD_SETEXPR is not set
 138 +# CONFIG_CMD_NFS is not set
 139 +CONFIG_CMD_PING=y
 140 +CONFIG_CMD_FAT=y
 141 +CONFIG_CMD_FS_GENERIC=y
 142 +CONFIG_CMD_LOG=y
 143 +CONFIG_EFI_PARTITION=y
 144 +# CONFIG_SPL_PARTITION_UUIDS is not set
 145 +CONFIG_PARTITION_TYPE_GUID=y
 146 +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-parents"
 147 +CONFIG_ENV_OVERWRITE=y
 148 +CONFIG_ENV_IS_IN_MTD=y
 149 +CONFIG_ENV_MTD_NAME="spi-nand0"
 150 +CONFIG_ENV_SIZE_REDUND=0x40000
 151 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 152 +CONFIG_NET_RANDOM_ETHADDR=y
 153 +CONFIG_SPL_DM_SEQ_ALIAS=y
 154 +CONFIG_REGMAP=y
 155 +CONFIG_SPL_REGMAP=y
 156 +CONFIG_SYSCON=y
 157 +CONFIG_SPL_SYSCON=y
 158 +CONFIG_BLK=y
 159 +CONFIG_CLK=y
 160 +CONFIG_SPL_CLK=y
 161 +# CONFIG_MMC is not set
 162 +CONFIG_MTD=y
 163 +CONFIG_DM_MTD=y
 164 +CONFIG_MTK_SPI_NAND=y
 165 +CONFIG_MTK_SPI_NAND_MTD=y
 166 +CONFIG_SPL_MTK_SPI_NAND=y
 167 +CONFIG_DM_ETH=y
 168 +CONFIG_MEDIATEK_ETH=y
 169 +CONFIG_PHY=y
 170 +CONFIG_PHY_MTK_TPHY=y
 171 +CONFIG_PINCTRL=y
 172 +CONFIG_PINCONF=y
 173 +CONFIG_SPL_PINCTRL=y
 174 +CONFIG_SPL_PINCONF=y
 175 +CONFIG_PINCTRL_MT7629=y
 176 +CONFIG_POWER_DOMAIN=y
 177 +CONFIG_MTK_POWER_DOMAIN=y
 178 +CONFIG_DM_REGULATOR=y
 179 +CONFIG_DM_REGULATOR_FIXED=y
 180 +CONFIG_RAM=y
 181 +CONFIG_SPL_RAM=y
 182 +CONFIG_DM_SERIAL=y
 183 +CONFIG_MTK_SERIAL=y
 184 +CONFIG_SPI=y
 185 +CONFIG_DM_SPI=y
 186 +CONFIG_SPI_MEM=y
 187 +CONFIG_MTK_SNFI_SPI=y
 188 +CONFIG_SYSRESET=y
 189 +CONFIG_SPL_SYSRESET=y
 190 +CONFIG_SYSRESET_WATCHDOG=y
 191 +CONFIG_USB=y
 192 +CONFIG_DM_USB=y
 193 +# CONFIG_SPL_DM_USB is not set
 194 +CONFIG_USB_XHCI_HCD=y
 195 +CONFIG_USB_XHCI_MTK=y
 196 +CONFIG_USB_STORAGE=y
 197 +CONFIG_WDT_MTK=y
 198 +CONFIG_FAT_WRITE=y
 199 +CONFIG_LZMA=y
 200 +CONFIG_SPL_LZMA=y
 201 +# CONFIG_EFI_LOADER is not set
 202 --- a/include/configs/mt7629.h
 203 +++ b/include/configs/mt7629.h
 204 @@ -25,12 +25,19 @@
 205
 206  /* Defines for SPL */
 207  #define CONFIG_SPL_STACK               0x106000
 208 +#ifdef CONFIG_MT7629_BOOT_FROM_SNAND
 209 +#define CONFIG_SPL_MAX_SIZE            SZ_128K
 210 +#define CONFIG_SPL_MAX_FOOTPRINT       SZ_128K
 211 +#define CONFIG_SPL_PAD_TO              0x20000
 212 +#define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
 213 +#else
 214  #define CONFIG_SPL_MAX_SIZE            SZ_64K
 215  #define CONFIG_SPL_MAX_FOOTPRINT       SZ_64K
 216  #define CONFIG_SPL_PAD_TO              0x10000
 217
 218  #define CONFIG_SPI_ADDR                        0x30000000
 219  #define CONFIG_SYS_UBOOT_BASE          (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
 220 +#endif
 221
 222  /* SPL -> Uboot */
 223  #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE + SZ_2M - \