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1 From 1b8ea7066ee06404e0148702bc3e85a191f6d867 Mon Sep 17 00:00:00 2001
2 From: MikeDK <m.kaplan@evva.com>
3 Date: Fri, 31 Jan 2020 12:45:43 +0100
4 Subject: [PATCH] overlays: Add sh1106-spi and ssd1351-spi overlays
5 (#3442)
6
7 Add overlays for SH1106 and SSD1351 based OLED displays.
8 SH1106 is present in many 1.3 inch OLEDs and SSD1351 is present in
9 1.5 inch RGB OLEDs from AliExpress.
10
11 This will load the staging fbtft drivers.
12
13 Signed-off-by: Michael Kaplan <m.kaplan@evva.com>
14 ---
15 arch/arm/boot/dts/overlays/Makefile | 2 +
16 arch/arm/boot/dts/overlays/README | 23 ++++++
17 .../boot/dts/overlays/sh1106-spi-overlay.dts | 82 +++++++++++++++++++
18 .../boot/dts/overlays/ssd1351-spi-overlay.dts | 81 ++++++++++++++++++
19 4 files changed, 188 insertions(+)
20 create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
21 create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
22
23 --- a/arch/arm/boot/dts/overlays/Makefile
24 +++ b/arch/arm/boot/dts/overlays/Makefile
25 @@ -145,6 +145,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
26 sdhost.dtbo \
27 sdio.dtbo \
28 sdtweak.dtbo \
29 + sh1106-spi.dtbo \
30 smi.dtbo \
31 smi-dev.dtbo \
32 smi-nand.dtbo \
33 @@ -169,6 +170,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
34 spi6-2cs.dtbo \
35 ssd1306.dtbo \
36 ssd1306-spi.dtbo \
37 + ssd1351-spi.dtbo \
38 superaudioboard.dtbo \
39 sx150x.dtbo \
40 tc358743.dtbo \
41 --- a/arch/arm/boot/dts/overlays/README
42 +++ b/arch/arm/boot/dts/overlays/README
43 @@ -2145,6 +2145,18 @@ Params: overclock_50 Clock (i
44 (default on)
45
46
47 +Name: sh1106-spi
48 +Info: Overlay for SH1106 OLED via SPI using fbtft staging driver.
49 +Load: dtoverlay=sh1106-spi,<param>=<val>
50 +Params: speed SPI bus speed (default 4000000)
51 + rotate Display rotation (0, 90, 180 or 270; default 0)
52 + fps Delay between frame updates (default 25)
53 + debug Debug output level (0-7; default 0)
54 + dc_pin GPIO pin for D/C (default 24)
55 + reset_pin GPIO pin for RESET (default 25)
56 + height Display height (32 or 64; default 64)
57 +
58 +
59 Name: smi
60 Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
61 Load: dtoverlay=smi
62 @@ -2440,6 +2452,17 @@ Params: speed SPI bus
63 height Display height (32 or 64; default 64)
64
65
66 +Name: ssd1351-spi
67 +Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
68 +Load: dtoverlay=ssd1351-spi,<param>=<val>
69 +Params: speed SPI bus speed (default 4500000)
70 + rotate Display rotation (0, 90, 180 or 270; default 0)
71 + fps Delay between frame updates (default 25)
72 + debug Debug output level (0-7; default 0)
73 + dc_pin GPIO pin for D/C (default 24)
74 + reset_pin GPIO pin for RESET (default 25)
75 +
76 +
77 Name: superaudioboard
78 Info: Configures the SuperAudioBoard sound card
79 Load: dtoverlay=superaudioboard,<param>=<val>
80 --- /dev/null
81 +++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
82 @@ -0,0 +1,82 @@
83 +/*
84 + * Device Tree overlay for SH1106 based SPI OLED display
85 + *
86 + */
87 +
88 +/dts-v1/;
89 +/plugin/;
90 +
91 +/ {
92 + compatible = "brcm,bcm2835";
93 +
94 + fragment@0 {
95 + target = <&spi0>;
96 + __overlay__ {
97 + status = "okay";
98 + };
99 + };
100 +
101 + fragment@1 {
102 + target = <&spidev0>;
103 + __overlay__ {
104 + status = "disabled";
105 + };
106 + };
107 +
108 + fragment@2 {
109 + target = <&spidev1>;
110 + __overlay__ {
111 + status = "disabled";
112 + };
113 + };
114 +
115 + fragment@3 {
116 + target = <&gpio>;
117 + __overlay__ {
118 + sh1106_pins: sh1106_pins {
119 + brcm,pins = <25 24>;
120 + brcm,function = <1 1>; /* out out */
121 + };
122 + };
123 + };
124 +
125 + fragment@4 {
126 + target = <&spi0>;
127 + __overlay__ {
128 + /* needed to avoid dtc warning */
129 + #address-cells = <1>;
130 + #size-cells = <0>;
131 +
132 + sh1106: sh1106@0{
133 + compatible = "sinowealth,sh1106";
134 + reg = <0>;
135 + pinctrl-names = "default";
136 + pinctrl-0 = <&sh1106_pins>;
137 +
138 + spi-max-frequency = <4000000>;
139 + bgr = <0>;
140 + bpp = <1>;
141 + rotate = <0>;
142 + fps = <25>;
143 + buswidth = <8>;
144 + reset-gpios = <&gpio 25 0>;
145 + dc-gpios = <&gpio 24 0>;
146 + debug = <0>;
147 +
148 + sinowealth,height = <64>;
149 + sinowealth,width = <128>;
150 + sinowealth,page-offset = <0>;
151 + };
152 + };
153 + };
154 +
155 + __overrides__ {
156 + speed = <&sh1106>,"spi-max-frequency:0";
157 + rotate = <&sh1106>,"rotate:0";
158 + fps = <&sh1106>,"fps:0";
159 + debug = <&sh1106>,"debug:0";
160 + dc_pin = <&sh1106>,"dc-gpios:4>";
161 + reset_pin = <&sh1106>,"reset-gpios:4>";
162 + height = <&sh1106>,"sinowealth,height:0>";
163 + };
164 +};
165 --- /dev/null
166 +++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
167 @@ -0,0 +1,81 @@
168 +/*
169 + * Device Tree overlay for SSD1351 based SPI OLED display
170 + *
171 + */
172 +
173 +/dts-v1/;
174 +/plugin/;
175 +
176 +/ {
177 + compatible = "brcm,bcm2835";
178 +
179 + fragment@0 {
180 + target = <&spi0>;
181 + __overlay__ {
182 + status = "okay";
183 + };
184 + };
185 +
186 + fragment@1 {
187 + target = <&spidev0>;
188 + __overlay__ {
189 + status = "disabled";
190 + };
191 + };
192 +
193 + fragment@2 {
194 + target = <&spidev1>;
195 + __overlay__ {
196 + status = "disabled";
197 + };
198 + };
199 +
200 + fragment@3 {
201 + target = <&gpio>;
202 + __overlay__ {
203 + ssd1351_pins: ssd1351_pins {
204 + brcm,pins = <25 24>;
205 + brcm,function = <1 1>; /* out out */
206 + };
207 + };
208 + };
209 +
210 + fragment@4 {
211 + target = <&spi0>;
212 + __overlay__ {
213 + /* needed to avoid dtc warning */
214 + #address-cells = <1>;
215 + #size-cells = <0>;
216 +
217 + ssd1351: ssd1351@0{
218 + compatible = "solomon,ssd1351";
219 + reg = <0>;
220 + pinctrl-names = "default";
221 + pinctrl-0 = <&ssd1351_pins>;
222 +
223 + spi-max-frequency = <4500000>;
224 + bgr = <0>;
225 + bpp = <16>;
226 + rotate = <0>;
227 + fps = <25>;
228 + buswidth = <8>;
229 + reset-gpios = <&gpio 25 0>;
230 + dc-gpios = <&gpio 24 0>;
231 + debug = <0>;
232 +
233 + solomon,height = <128>;
234 + solomon,width = <128>;
235 + solomon,page-offset = <0>;
236 + };
237 + };
238 + };
239 +
240 + __overrides__ {
241 + speed = <&ssd1351>,"spi-max-frequency:0";
242 + rotate = <&ssd1351>,"rotate:0";
243 + fps = <&ssd1351>,"fps:0";
244 + debug = <&ssd1351>,"debug:0";
245 + dc_pin = <&ssd1351>,"dc-gpios:4>";
246 + reset_pin = <&ssd1351>,"reset-gpios:4>";
247 + };
248 +};
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