git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 12abb6775e99482ff9fc71e16292ccf4dfeacee5 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Thu, 13 Feb 2020 15:47:18 +0100
   4 Subject: [PATCH] dt-bindings: display: vc4: dsi: Add missing clock
   5  properties
   6
   7 While the device tree and the driver expected a clock-names and a
   8 clock-cells properties, it wasn't explicitly documented in the previous
   9 binding. Make sure it is now.
  10
  11 Cc: devicetree@vger.kernel.org
  12 Reviewed-by: Rob Herring <robh+dt@kernel.org>
  13 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  14 ---
  15  .../bindings/display/brcm,bcm2835-dsi0.yaml           | 11 +++++++++++
  16  1 file changed, 11 insertions(+)
  17
  18 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml
  19 +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml
  20 @@ -10,6 +10,9 @@ maintainers:
  21    - Eric Anholt <eric@anholt.net>
  22
  23  properties:
  24 +  "#clock-cells":
  25 +    const: 1
  26 +
  27    compatible:
  28      enum:
  29        - brcm,bcm2835-dsi0
  30 @@ -24,6 +27,12 @@ properties:
  31        - description: The DSI ESC clock
  32        - description: The DSI pixel clock
  33
  34 +  clock-names:
  35 +    items:
  36 +      - const: phy
  37 +      - const: escape
  38 +      - const: pixel
  39 +
  40    clock-output-names: true
  41      # FIXME: The meta-schemas don't seem to allow it for now
  42      # items:
  43 @@ -35,9 +44,11 @@ properties:
  44      maxItems: 1
  45
  46  required:
  47 +  - "#clock-cells"
  48    - compatible
  49    - reg
  50    - clocks
  51 +  - clock-names
  52    - clock-output-names
  53    - interrupts
  54