4ba492014a5f56e57dc3cf9530632617b7b97fb1
[openwrt/staging/ansuel.git] /
1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Fri, 24 Mar 2023 14:56:58 +0100
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: fix tx throughput regression with
4 direct 1G links
5
6 Using the QDMA tx scheduler to throttle tx to line speed works fine for
7 switch ports, but apparently caused a regression on non-switch ports.
8
9 Based on a number of tests, it seems that this throttling can be safely
10 dropped without re-introducing the issues on switch ports that the
11 tx scheduling changes resolved.
12
13 Link: https://lore.kernel.org/netdev/trinity-92c3826f-c2c8-40af-8339-bc6d0d3ffea4-1678213958520@3c-app-gmx-bs16/
14 Fixes: f63959c7eec3 ("net: ethernet: mtk_eth_soc: implement multi-queue support for per-port queues")
15 Reported-by: Frank Wunderlich <frank-w@public-files.de>
16 Reported-by: Daniel Golle <daniel@makrotopia.org>
17 Tested-by: Daniel Golle <daniel@makrotopia.org>
18 Signed-off-by: Felix Fietkau <nbd@nbd.name>
19 ---
20
21 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
22 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
23 @@ -675,8 +675,6 @@ static void mtk_mac_link_up(struct phyli
24 break;
25 }
26
27 - mtk_set_queue_speed(mac->hw, mac->id, speed);
28 -
29 /* Configure duplex */
30 if (duplex == DUPLEX_FULL)
31 mcr |= MAC_MCR_FORCE_DPX;