git.openwrt.org Git - openwrt/staging/wigyori.git/blob

   1 From db1bb7741ff29bf2cefcbc0ca567644e9ed1caa9 Mon Sep 17 00:00:00 2001
   2 From: Heiner Kallweit <hkallweit1@gmail.com>
   3 Date: Sun, 4 Feb 2024 15:18:50 +0100
   4 Subject: [PATCH] net: phy: realtek: add 5Gbps support to rtl822x_config_aneg()
   5
   6 RTL8126 as an evolution of RTL8125 supports 5Gbps. rtl822x_config_aneg()
   7 is used by the PHY driver for the integrated PHY, therefore add 5Gbps
   8 support to it.
   9
  10 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  11 Link: https://lore.kernel.org/r/5644ab50-e3e9-477c-96db-05cd5bdc2563@gmail.com
  12 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  13 ---
  14  drivers/net/phy/realtek.c | 12 ++++++++----
  15  1 file changed, 8 insertions(+), 4 deletions(-)
  16
  17 --- a/drivers/net/phy/realtek.c
  18 +++ b/drivers/net/phy/realtek.c
  19 @@ -682,15 +682,19 @@ static int rtl822x_config_aneg(struct ph
  20         int ret = 0;
  21
  22         if (phydev->autoneg == AUTONEG_ENABLE) {
  23 -               u16 adv2500 = 0;
  24 +               u16 adv = 0;
  25
  26                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
  27                                       phydev->advertising))
  28 -                       adv2500 = MDIO_AN_10GBT_CTRL_ADV2_5G;
  29 +                       adv |= MDIO_AN_10GBT_CTRL_ADV2_5G;
  30 +               if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
  31 +                                     phydev->advertising))
  32 +                       adv |= MDIO_AN_10GBT_CTRL_ADV5G;
  33
  34                 ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
  35 -                                              MDIO_AN_10GBT_CTRL_ADV2_5G,
  36 -                                              adv2500);
  37 +                                              MDIO_AN_10GBT_CTRL_ADV2_5G |
  38 +                                              MDIO_AN_10GBT_CTRL_ADV5G,
  39 +                                              adv);
  40                 if (ret < 0)
  41                         return ret;
  42         }