git.openwrt.org Git - openwrt/staging/chunkeey.git/blob

   1 From a02d918e1bf4dc70c51b630c12182e038d0a73d2 Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Tue, 14 Apr 2020 15:47:09 +0100
   4 Subject: [PATCH] media: i2c: ov9281: fix mclk issue when probe
   5  multiple camera.
   6
   7 Takes the ov9281 part only from the Rockchip's patch.
   8
   9 Change-Id: I30e833baf2c1bb07d6d87ddb3b00759ab45a90e4
  10 Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
  11 ---
  12  drivers/media/i2c/ov9281.c | 16 ++++++++--------
  13  1 file changed, 8 insertions(+), 8 deletions(-)
  14
  15 --- a/drivers/media/i2c/ov9281.c
  16 +++ b/drivers/media/i2c/ov9281.c
  17 @@ -3,6 +3,7 @@
  18   * ov9281 driver
  19   *
  20   * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
  21 + * V0.0X01.0X02 fix mclk issue when probe multiple camera.
  22   */
  23
  24  #include <linux/clk.h>
  25 @@ -22,7 +23,7 @@
  26  #include <media/v4l2-subdev.h>
  27  #include <linux/pinctrl/consumer.h>
  28
  29 -#define DRIVER_VERSION                 KERNEL_VERSION(0, 0x01, 0x0)
  30 +#define DRIVER_VERSION                 KERNEL_VERSION(0, 0x01, 0x2)
  31
  32  #ifndef V4L2_CID_DIGITAL_GAIN
  33  #define V4L2_CID_DIGITAL_GAIN          V4L2_CID_GAIN
  34 @@ -676,6 +677,12 @@ static int __ov9281_power_on(struct ov92
  35                         dev_err(dev, "could not set pins\n");
  36         }
  37
  38 +       ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
  39 +       if (ret < 0)
  40 +               dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
  41 +       if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
  42 +               dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
  43 +
  44         ret = clk_prepare_enable(ov9281->xvclk);
  45         if (ret < 0) {
  46                 dev_err(dev, "Failed to enable xvclk\n");
  47 @@ -1008,13 +1015,6 @@ static int ov9281_probe(struct i2c_clien
  48                 dev_err(dev, "Failed to get xvclk\n");
  49                 return -EINVAL;
  50         }
  51 -       ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
  52 -       if (ret < 0) {
  53 -               dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
  54 -               return ret;
  55 -       }
  56 -       if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
  57 -               dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
  58
  59         ov9281->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  60         if (IS_ERR(ov9281->reset_gpio))