git.openwrt.org Git - openwrt/staging/wigyori.git/blob

   1 From c70ae3d1923339746d156bd1d723d141113183aa Mon Sep 17 00:00:00 2001
   2 From: Joerg Schambacher <joerg@i2audio.com>
   3 Date: Mon, 1 Feb 2021 16:53:46 +0100
   4 Subject: [PATCH] Hifiberry DAC+ADC Pro fix for the PLL when changing
   5  sample rates
   6
   7 Adds 2 msecs delay when switching between oscillators to allow
   8 correct PLL settling.
   9 Thanks to Clive Messer for the support!
  10
  11 Signed-off-by: Joerg Schambacher <joerg@hifiberry.com>
  12 ---
  13  sound/soc/bcm/hifiberry_dacplusadcpro.c | 14 ++++----------
  14  1 file changed, 4 insertions(+), 10 deletions(-)
  15
  16 --- a/sound/soc/bcm/hifiberry_dacplusadcpro.c
  17 +++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c
  18 @@ -190,6 +190,7 @@ static void snd_rpi_hifiberry_dacplusadc
  19                                 PCM512x_GPIO_CONTROL_1, 0x24, 0x04);
  20                 break;
  21         }
  22 +       usleep_range(2000, 2100);
  23  }
  24
  25  static void snd_rpi_hifiberry_dacplusadcpro_clk_gpio(struct snd_soc_component *component)
  26 @@ -207,13 +208,6 @@ static bool snd_rpi_hifiberry_dacplusadc
  27         return (!(sck & 0x40));
  28  }
  29
  30 -static bool snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(
  31 -       struct snd_soc_component *component)
  32 -{
  33 -       msleep(2);
  34 -       return snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
  35 -}
  36 -
  37  static bool snd_rpi_hifiberry_dacplusadcpro_is_pro_card(struct snd_soc_component *component)
  38  {
  39         bool isClk44EN, isClk48En, isNoClk;
  40 @@ -221,13 +215,13 @@ static bool snd_rpi_hifiberry_dacplusadc
  41         snd_rpi_hifiberry_dacplusadcpro_clk_gpio(component);
  42
  43         snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_CLK44EN);
  44 -       isClk44EN = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
  45 +       isClk44EN = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
  46
  47         snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_NOCLOCK);
  48 -       isNoClk = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
  49 +       isNoClk = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
  50
  51         snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_CLK48EN);
  52 -       isClk48En = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
  53 +       isClk48En = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
  54
  55         return (isClk44EN && isClk48En && !isNoClk);
  56  }