463c3d4a65828a852da35d997c043801cd15cc41
[openwrt/staging/blogic.git] /
1 From 7f5aecdd4ffcc018f73171bc0e028cd4e3361acd Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Thu, 7 Jul 2022 03:09:43 +0200
4 Subject: [PATCH 8/8] ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node
5
6 Add speedbin efuse nvmem cell needed for the opp table for the CPU
7 freqs.
8
9 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
10 Tested-by: Jonathan McDowell <noodles@earth.li>
11 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
12 Link: https://lore.kernel.org/r/20220707010943.20857-10-ansuelsmth@gmail.com
13 ---
14 arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
15 1 file changed, 3 insertions(+)
16
17 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
18 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
19 @@ -854,6 +854,9 @@
20 reg = <0x00700000 0x1000>;
21 #address-cells = <1>;
22 #size-cells = <1>;
23 + speedbin_efuse: speedbin@c0 {
24 + reg = <0xc0 0x4>;
25 + };
26 tsens_calib: calib@400 {
27 reg = <0x400 0xb>;
28 };