git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From b67cad33176e472df6d16a24ee7624299bdcd5d5 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Fri, 16 Jun 2023 12:58:27 +0200
   4 Subject: [PATCH] ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 This fixes:
  10 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@12000: '#address-cells' is a required property
  11         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  12 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@12000: '#size-cells' is a required property
  13         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  14 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@13000: '#address-cells' is a required property
  15         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  16 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@13000: '#size-cells' is a required property
  17         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  18 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@14000: '#address-cells' is a required property
  19         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  20 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@14000: '#size-cells' is a required property
  21         From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
  22
  23 Two properties that need to be added later are "device_type" and
  24 "ranges". Adding "device_type" on its own causes a new warning and the
  25 value of "ranges" needs to be determined yet.
  26
  27 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  28 Link: https://lore.kernel.org/r/20230616105827.21656-1-zajec5@gmail.com
  29 Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
  30 ---
  31  arch/arm/boot/dts/bcm-ns.dtsi | 9 +++++++++
  32  1 file changed, 9 insertions(+)
  33
  34 --- a/arch/arm/boot/dts/bcm-ns.dtsi
  35 +++ b/arch/arm/boot/dts/bcm-ns.dtsi
  36 @@ -176,14 +176,23 @@
  37
  38                 pcie0: pcie@12000 {
  39                         reg = <0x00012000 0x1000>;
  40 +
  41 +                       #address-cells = <3>;
  42 +                       #size-cells = <2>;
  43                 };
  44
  45                 pcie1: pcie@13000 {
  46                         reg = <0x00013000 0x1000>;
  47 +
  48 +                       #address-cells = <3>;
  49 +                       #size-cells = <2>;
  50                 };
  51
  52                 pcie2: pcie@14000 {
  53                         reg = <0x00014000 0x1000>;
  54 +
  55 +                       #address-cells = <3>;
  56 +                       #size-cells = <2>;
  57                 };
  58
  59                 usb2: usb2@21000 {