44f0864e9a8369fbb12d377c6090c4b9ba6fe022
[openwrt/staging/xback.git] /
1 From 789d3eeb2367f92193a0882f7cdab03f0f9d6930 Mon Sep 17 00:00:00 2001
2 From: Thomas Perrot <thomas.perrot@bootlin.com>
3 Date: Thu, 16 Dec 2021 13:42:27 +0530
4 Subject: [PATCH] bus: mhi: pci_generic: Introduce Sierra EM919X support
5
6 Add support for EM919X modems, this modem series is based on SDX55
7 qcom chip.
8
9 It is mandatory to use the same ring for control+data and diag events.
10
11 Link: https://lore.kernel.org/r/20211123081541.648426-1-thomas.perrot@bootlin.com
12 Tested-by: Aleksander Morgado <aleksander@aleksander.es>
13 Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
14 Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
15 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
16 Link: https://lore.kernel.org/r/20211216081227.237749-11-manivannan.sadhasivam@linaro.org
17 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 ---
19 drivers/bus/mhi/host/pci_generic.c | 43 +++++++++++++++++++++++++++++++++++
20 1 file changed, 43 insertions(+)
21
22 --- a/drivers/bus/mhi/host/pci_generic.c
23 +++ b/drivers/bus/mhi/host/pci_generic.c
24 @@ -406,6 +406,46 @@ static const struct mhi_pci_dev_info mhi
25 .mru_default = 32768,
26 };
27
28 +static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {
29 + MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 32, 0),
30 + MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 256, 0),
31 + MHI_CHANNEL_CONFIG_UL(4, "DIAG", 32, 0),
32 + MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 0),
33 + MHI_CHANNEL_CONFIG_UL(12, "MBIM", 128, 0),
34 + MHI_CHANNEL_CONFIG_DL(13, "MBIM", 128, 0),
35 + MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
36 + MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
37 + MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
38 + MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
39 + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 512, 1),
40 + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 512, 2),
41 +};
42 +
43 +static struct mhi_event_config modem_sierra_em919x_mhi_events[] = {
44 + /* first ring is control+data and DIAG ring */
45 + MHI_EVENT_CONFIG_CTRL(0, 2048),
46 + /* Hardware channels request dedicated hardware event rings */
47 + MHI_EVENT_CONFIG_HW_DATA(1, 2048, 100),
48 + MHI_EVENT_CONFIG_HW_DATA(2, 2048, 101)
49 +};
50 +
51 +static const struct mhi_controller_config modem_sierra_em919x_config = {
52 + .max_channels = 128,
53 + .timeout_ms = 24000,
54 + .num_channels = ARRAY_SIZE(mhi_sierra_em919x_channels),
55 + .ch_cfg = mhi_sierra_em919x_channels,
56 + .num_events = ARRAY_SIZE(modem_sierra_em919x_mhi_events),
57 + .event_cfg = modem_sierra_em919x_mhi_events,
58 +};
59 +
60 +static const struct mhi_pci_dev_info mhi_sierra_em919x_info = {
61 + .name = "sierra-em919x",
62 + .config = &modem_sierra_em919x_config,
63 + .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
64 + .dma_data_width = 32,
65 + .sideband_wake = false,
66 +};
67 +
68 static const struct mhi_channel_config mhi_telit_fn980_hw_v1_channels[] = {
69 MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
70 MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
71 @@ -480,6 +520,9 @@ static const struct mhi_pci_dev_info mhi
72 };
73
74 static const struct pci_device_id mhi_pci_id_table[] = {
75 + /* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
76 + { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200),
77 + .driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info },
78 /* Telit FN980 hardware revision v1 */
79 { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x1C5D, 0x2000),
80 .driver_data = (kernel_ulong_t) &mhi_telit_fn980_hw_v1_info },