1 From 5fdc065751ee25688f99da501123f7e7d4020751 Mon Sep 17 00:00:00 2001
2 From: Vladimir Oltean <vladimir.oltean@nxp.com>
3 Date: Fri, 22 Nov 2019 13:46:46 +0200
4 Subject: [PATCH] net: phylink: make QSGMII a valid PHY mode for in-band AN
6 QSGMII is a SerDes protocol clocked at 5 Gbaud (4 times higher than
7 SGMII which is clocked at 1.25 Gbaud), with the same 8b/10b encoding and
8 some extra symbols for synchronization. Logically it offers 4 SGMII
9 interfaces multiplexed onto the same physical lanes. Each MAC PCS has
10 its own in-band AN process with the system side of the QSGMII PHY, which
11 is identical to the regular SGMII AN process.
13 So allow QSGMII as a valid in-band AN mode, since it is no different
14 from software perspective from regular SGMII.
16 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
18 drivers/net/phy/phylink.c | 1 +
19 1 file changed, 1 insertion(+)
21 --- a/drivers/net/phy/phylink.c
22 +++ b/drivers/net/phy/phylink.c
23 @@ -283,6 +283,7 @@ static int phylink_parse_mode(struct phy
25 switch (pl->link_config.interface) {
26 case PHY_INTERFACE_MODE_SGMII:
27 + case PHY_INTERFACE_MODE_QSGMII:
28 phylink_set(pl->supported, 10baseT_Half);
29 phylink_set(pl->supported, 10baseT_Full);
30 phylink_set(pl->supported, 100baseT_Half);