42bf170a03de9d41d048242bd297f45b02a71d8a
[openwrt/staging/pepe2k.git] /
1 From a96f10422e74cde27c100b321b127ec32ae75747 Mon Sep 17 00:00:00 2001
2 From: Muna Sinada <quic_msinada@quicinc.com>
3 Date: Fri, 24 Feb 2023 12:28:03 +0200
4 Subject: [PATCH] wifi: ath11k: modify accessor macros to match index size
5
6 HE PHY is only 11 bytes, therefore it should be using byte indexes
7 instead of dword. Change corresponding macros to reflect this.
8
9 Signed-off-by: Muna Sinada <quic_msinada@quicinc.com>
10 Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
11 Link: https://lore.kernel.org/r/1666128501-12364-2-git-send-email-quic_msinada@quicinc.com
12 ---
13 drivers/net/wireless/ath/ath11k/wmi.h | 24 +++++++++++++-----------
14 1 file changed, 13 insertions(+), 11 deletions(-)
15
16 --- a/drivers/net/wireless/ath/ath11k/wmi.h
17 +++ b/drivers/net/wireless/ath/ath11k/wmi.h
18 @@ -2859,30 +2859,32 @@ struct rx_reorder_queue_remove_params {
19 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
20 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
21
22 -#define HECAP_PHYDWORD_0 0
23 -#define HECAP_PHYDWORD_1 1
24 -#define HECAP_PHYDWORD_2 2
25 +#define HE_PHYCAP_BYTE_0 0
26 +#define HE_PHYCAP_BYTE_1 1
27 +#define HE_PHYCAP_BYTE_2 2
28 +#define HE_PHYCAP_BYTE_3 3
29 +#define HE_PHYCAP_BYTE_4 4
30
31 -#define HECAP_PHY_SU_BFER BIT(31)
32 +#define HECAP_PHY_SU_BFER BIT(7)
33 #define HECAP_PHY_SU_BFEE BIT(0)
34 #define HECAP_PHY_MU_BFER BIT(1)
35 -#define HECAP_PHY_UL_MUMIMO BIT(22)
36 -#define HECAP_PHY_UL_MUOFDMA BIT(23)
37 +#define HECAP_PHY_UL_MUMIMO BIT(6)
38 +#define HECAP_PHY_UL_MUOFDMA BIT(7)
39
40 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
41 - FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
42 + FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
43
44 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
45 - FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
46 + FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
47
48 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
49 - FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
50 + FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
51
52 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
53 - FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
54 + FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
55
56 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
57 - FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
58 + FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
59
60 #define HE_MODE_SU_TX_BFEE BIT(0)
61 #define HE_MODE_SU_TX_BFER BIT(1)