git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From 8e40644b272a4ddc9d3b58b4373dffcef02d1b63 Mon Sep 17 00:00:00 2001
   2 From: Jonathan Bell <jonathan@raspberrypi.com>
   3 Date: Tue, 4 Jun 2024 13:21:47 +0100
   4 Subject: [PATCH 1115/1135] mmc: sd: halt CQHCI before issuing a cache flush
   5  command
   6
   7 SD cards perform cache flushes by a CMD49 extension register write -
   8 which needs to be started from the SDHCI command/argument registers and
   9 not a CQHCI slot.
  10
  11 Host access to SD/CQ registers should be exclusive to one or the other,
  12 so issue a halt before doing the command.
  13
  14 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  15 ---
  16  drivers/mmc/core/sd.c | 8 ++++++++
  17  1 file changed, 8 insertions(+)
  18
  19 --- a/drivers/mmc/core/sd.c
  20 +++ b/drivers/mmc/core/sd.c
  21 @@ -1265,6 +1265,14 @@ static int sd_flush_cache(struct mmc_hos
  22         reg_buf = card->ext_reg_buf;
  23
  24         /*
  25 +        * Flushing requires sending CMD49 (adtc), which can't be done as a DCMD
  26 +        * and conflicts with CQHCI - temporarily turn CQE off to use the SDHCI
  27 +        * command/argument registers.
  28 +        */
  29 +       if (host->cqe_on)
  30 +               host->cqe_ops->cqe_off(host);
  31 +
  32 +       /*
  33          * Set Flush Cache at bit 0 in the performance enhancement register at
  34          * 261 bytes offset.
  35          */