3d814b1252e1360c4fe53ad77e41fe14a798dad3
[openwrt/staging/blogic.git] /
1 From 8b0c59c622dc4dab970ec63264fb5b152944ac80 Mon Sep 17 00:00:00 2001
2 From: Arnd Bergmann <arnd@arndb.de>
3 Date: Thu, 23 Dec 2021 00:17:17 +0100
4 Subject: [PATCH] Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus
5 RT-AC88U"
6
7 This reverts commit 3d2d52a0d1835b56f6bd67d268f6c39df0e41692, it caused
8 a build regression:
9
10 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:109.4-14: Warning (reg_format): /switch/ports:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
11 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
12 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
13 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
14 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
15 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #address-cells value
16 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #size-cells value
17
18 Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
19 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
20 ---
21 arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 77 --------------------
22 1 file changed, 77 deletions(-)
23
24 --- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
25 +++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
26 @@ -93,83 +93,6 @@
27 gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
28 };
29 };
30 -
31 - switch {
32 - compatible = "realtek,rtl8365mb";
33 - /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
34 - mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
35 - mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
36 - reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
37 - realtek,disable-leds;
38 - dsa,member = <1 0>;
39 -
40 - ports {
41 - #address-cells = <1>;
42 - #size-cells = <0>;
43 - reg = <0>;
44 -
45 - port@0 {
46 - reg = <0>;
47 - label = "lan5";
48 - phy-handle = <&ethphy0>;
49 - };
50 -
51 - port@1 {
52 - reg = <1>;
53 - label = "lan6";
54 - phy-handle = <&ethphy1>;
55 - };
56 -
57 - port@2 {
58 - reg = <2>;
59 - label = "lan7";
60 - phy-handle = <&ethphy2>;
61 - };
62 -
63 - port@3 {
64 - reg = <3>;
65 - label = "lan8";
66 - phy-handle = <&ethphy3>;
67 - };
68 -
69 - port@6 {
70 - reg = <6>;
71 - label = "cpu";
72 - ethernet = <&sw0_p5>;
73 - phy-mode = "rgmii";
74 - tx-internal-delay-ps = <2000>;
75 - rx-internal-delay-ps = <2100>;
76 -
77 - fixed-link {
78 - speed = <1000>;
79 - full-duplex;
80 - pause;
81 - };
82 - };
83 - };
84 -
85 - mdio {
86 - compatible = "realtek,smi-mdio";
87 - #address-cells = <1>;
88 - #size-cells = <0>;
89 -
90 - ethphy0: ethernet-phy@0 {
91 - reg = <0>;
92 - };
93 -
94 - ethphy1: ethernet-phy@1 {
95 - reg = <1>;
96 - };
97 -
98 - ethphy2: ethernet-phy@2 {
99 - reg = <2>;
100 - };
101 -
102 - ethphy3: ethernet-phy@3 {
103 - reg = <3>;
104 - };
105 - };
106 - };
107 };
108
109 &srab {