git.openwrt.org Git - openwrt/staging/xback.git/blob

   1 From 7f9dfaa2afb6bc3481e531c405b05acf6091af29 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 24 Mar 2021 09:19:07 +0100
   4 Subject: [PATCH 06/22] dt-bindings: add BCM6328 GPIO sysctl binding
   5  documentation
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Add binding documentation for the GPIO sysctl found in BCM6328 SoCs.
  11
  12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  13 Reviewed-by: Rob Herring <robh@kernel.org>
  14 Link: https://lore.kernel.org/r/20210324081923.20379-7-noltari@gmail.com
  15 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  16 ---
  17  .../mfd/brcm,bcm6328-gpio-sysctl.yaml         | 162 ++++++++++++++++++
  18  1 file changed, 162 insertions(+)
  19  create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml
  20
  21 --- /dev/null
  22 +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml
  23 @@ -0,0 +1,162 @@
  24 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  25 +%YAML 1.2
  26 +---
  27 +$id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml#
  28 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  29 +
  30 +title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings
  31 +
  32 +maintainers:
  33 +  - Álvaro Fernández Rojas <noltari@gmail.com>
  34 +  - Jonas Gorski <jonas.gorski@gmail.com>
  35 +
  36 +description:
  37 +  Broadcom BCM6328 SoC GPIO system controller which provides a register map
  38 +  for controlling the GPIO and pins of the SoC.
  39 +
  40 +properties:
  41 +  "#address-cells": true
  42 +
  43 +  "#size-cells": true
  44 +
  45 +  compatible:
  46 +    items:
  47 +      - const: brcm,bcm6328-gpio-sysctl
  48 +      - const: syscon
  49 +      - const: simple-mfd
  50 +
  51 +  ranges:
  52 +    maxItems: 1
  53 +
  54 +  reg:
  55 +    maxItems: 1
  56 +
  57 +patternProperties:
  58 +  "^gpio@[0-9a-f]+$":
  59 +    # Child node
  60 +    type: object
  61 +    $ref: "../gpio/brcm,bcm6345-gpio.yaml"
  62 +    description:
  63 +      GPIO controller for the SoC GPIOs. This child node definition
  64 +      should follow the bindings specified in
  65 +      Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
  66 +
  67 +  "^pinctrl@[0-9a-f]+$":
  68 +    # Child node
  69 +    type: object
  70 +    $ref: "../pinctrl/brcm,bcm6328-pinctrl.yaml"
  71 +    description:
  72 +      Pin controller for the SoC pins. This child node definition
  73 +      should follow the bindings specified in
  74 +      Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml.
  75 +
  76 +required:
  77 +  - "#address-cells"
  78 +  - compatible
  79 +  - ranges
  80 +  - reg
  81 +  - "#size-cells"
  82 +
  83 +additionalProperties: false
  84 +
  85 +examples:
  86 +  - |
  87 +    syscon@10000080 {
  88 +      #address-cells = <1>;
  89 +      #size-cells = <1>;
  90 +      compatible = "brcm,bcm6328-gpio-sysctl", "syscon", "simple-mfd";
  91 +      reg = <0x10000080 0x80>;
  92 +      ranges = <0 0x10000080 0x80>;
  93 +
  94 +      gpio@0 {
  95 +        compatible = "brcm,bcm6328-gpio";
  96 +        reg-names = "dirout", "dat";
  97 +        reg = <0x0 0x8>, <0x8 0x8>;
  98 +
  99 +        gpio-controller;
 100 +        gpio-ranges = <&pinctrl 0 0 32>;
 101 +        #gpio-cells = <2>;
 102 +      };
 103 +
 104 +      pinctrl: pinctrl@18 {
 105 +        compatible = "brcm,bcm6328-pinctrl";
 106 +        reg = <0x18 0x10>;
 107 +
 108 +        pinctrl_serial_led: serial_led-pins {
 109 +          pinctrl_serial_led_data: serial_led_data-pins {
 110 +            function = "serial_led_data";
 111 +            pins = "gpio6";
 112 +          };
 113 +
 114 +          pinctrl_serial_led_clk: serial_led_clk-pins {
 115 +            function = "serial_led_clk";
 116 +            pins = "gpio7";
 117 +          };
 118 +        };
 119 +
 120 +        pinctrl_inet_act_led: inet_act_led-pins {
 121 +          function = "inet_act_led";
 122 +          pins = "gpio11";
 123 +        };
 124 +
 125 +        pinctrl_pcie_clkreq: pcie_clkreq-pins {
 126 +          function = "pcie_clkreq";
 127 +          pins = "gpio16";
 128 +        };
 129 +
 130 +        pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
 131 +          function = "led";
 132 +          pins = "gpio17";
 133 +        };
 134 +
 135 +        pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
 136 +          function = "led";
 137 +          pins = "gpio18";
 138 +        };
 139 +
 140 +        pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
 141 +          function = "led";
 142 +          pins = "gpio19";
 143 +        };
 144 +
 145 +        pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
 146 +          function = "led";
 147 +          pins = "gpio20";
 148 +        };
 149 +
 150 +        pinctrl_ephy0_act_led: ephy0_act_led-pins {
 151 +          function = "ephy0_act_led";
 152 +          pins = "gpio25";
 153 +        };
 154 +
 155 +        pinctrl_ephy1_act_led: ephy1_act_led-pins {
 156 +          function = "ephy1_act_led";
 157 +          pins = "gpio26";
 158 +        };
 159 +
 160 +        pinctrl_ephy2_act_led: ephy2_act_led-pins {
 161 +          function = "ephy2_act_led";
 162 +          pins = "gpio27";
 163 +        };
 164 +
 165 +        pinctrl_ephy3_act_led: ephy3_act_led-pins {
 166 +          function = "ephy3_act_led";
 167 +          pins = "gpio28";
 168 +        };
 169 +
 170 +        pinctrl_hsspi_cs1: hsspi_cs1-pins {
 171 +          function = "hsspi_cs1";
 172 +          pins = "hsspi_cs1";
 173 +        };
 174 +
 175 +        pinctrl_usb_port1_device: usb_port1_device-pins {
 176 +          function = "usb_device_port";
 177 +          pins = "usb_port1";
 178 +        };
 179 +
 180 +        pinctrl_usb_port1_host: usb_port1_host-pins {
 181 +          function = "usb_host_port";
 182 +          pins = "usb_port1";
 183 +        };
 184 +      };
 185 +    };