git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From e071e9b36cb053f06a10986d987bfeb0e362657c Mon Sep 17 00:00:00 2001
   2 From: P33M <p33m@github.com>
   3 Date: Tue, 13 Feb 2018 15:41:35 +0000
   4 Subject: [PATCH 205/454] dwc_otg: Fix a regression when dequeueing isochronous
   5  transfers
   6
   7 In 282bed95 (dwc_otg: make nak_holdoff work as intended with empty queues)
   8 the dequeue mechanism was changed to leave FIQ-enabled transfers to run
   9 to completion - to avoid leaving hub TT buffers with stale packets lying
  10 around.
  11
  12 This broke FIQ-accelerated isochronous transfers, as this then meant that
  13 dozens of transfers were performed after the dequeue function returned.
  14
  15 Restore the state machine fence for isochronous transfers.
  16 ---
  17  drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 16 +++++++++++++++-
  18  1 file changed, 15 insertions(+), 1 deletion(-)
  19
  20 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
  21 +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
  22 @@ -189,13 +189,21 @@ static void kill_urbs_in_qh_list(dwc_otg
  23
  24                 }
  25                 if(qh->channel) {
  26 +                       int n = qh->channel->hc_num;
  27                         /* Using hcchar.chen == 1 is not a reliable test.
  28                          * It is possible that the channel has already halted
  29                          * but not yet been through the IRQ handler.
  30                          */
  31                         if (fiq_fsm_enable && (hcd->fiq_state->channel[qh->channel->hc_num].fsm != FIQ_PASSTHROUGH)) {
  32 +                               local_fiq_disable();
  33 +                               fiq_fsm_spin_lock(&hcd->fiq_state->lock);
  34                                 qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE;
  35                                 qh->channel->halt_pending = 1;
  36 +                               if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO ||
  37 +                                       hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
  38 +                                       hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED;
  39 +                               fiq_fsm_spin_unlock(&hcd->fiq_state->lock);
  40 +                               local_fiq_enable();
  41                         } else {
  42                                 dwc_otg_hc_halt(hcd->core_if, qh->channel,
  43                                                 DWC_OTG_HC_XFER_URB_DEQUEUE);
  44 @@ -596,9 +604,15 @@ int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_
  45                         /* In FIQ FSM mode, we need to shut down carefully.
  46                          * The FIQ may attempt to restart a disabled channel */
  47                         if (fiq_fsm_enable && (hcd->fiq_state->channel[n].fsm != FIQ_PASSTHROUGH)) {
  48 +                               local_fiq_disable();
  49 +                               fiq_fsm_spin_lock(&hcd->fiq_state->lock);
  50                                 qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE;
  51                                 qh->channel->halt_pending = 1;
  52 -                               //hcd->fiq_state->channel[n].fsm = FIQ_DEQUEUE_ISSUED;
  53 +                               if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO ||
  54 +                                       hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
  55 +                                       hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED;
  56 +                               fiq_fsm_spin_unlock(&hcd->fiq_state->lock);
  57 +                               local_fiq_enable();
  58                         } else {
  59                                 dwc_otg_hc_halt(hcd->core_if, qh->channel,
  60                                                 DWC_OTG_HC_XFER_URB_DEQUEUE);