2ff0b341f9156adc197abf74b3cec88710cefc2f
[openwrt/staging/xback.git] /
1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Mon, 21 Feb 2022 15:55:19 +0100
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: remove bridge flow offload
4 type entry support
5
6 According to MediaTek, this feature is not supported in current hardware
7
8 Signed-off-by: Felix Fietkau <nbd@nbd.name>
9 ---
10
11 --- a/drivers/net/ethernet/mediatek/mtk_ppe.c
12 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
13 @@ -84,13 +84,6 @@ static u32 mtk_ppe_hash_entry(struct mtk
14 u32 hash;
15
16 switch (FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, e->ib1)) {
17 - case MTK_PPE_PKT_TYPE_BRIDGE:
18 - hv1 = e->bridge.src_mac_lo;
19 - hv1 ^= ((e->bridge.src_mac_hi & 0xffff) << 16);
20 - hv2 = e->bridge.src_mac_hi >> 16;
21 - hv2 ^= e->bridge.dest_mac_lo;
22 - hv3 = e->bridge.dest_mac_hi;
23 - break;
24 case MTK_PPE_PKT_TYPE_IPV4_ROUTE:
25 case MTK_PPE_PKT_TYPE_IPV4_HNAPT:
26 hv1 = e->ipv4.orig.ports;
27 @@ -572,7 +565,6 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
28 MTK_PPE_FLOW_CFG_IP4_NAT |
29 MTK_PPE_FLOW_CFG_IP4_NAPT |
30 MTK_PPE_FLOW_CFG_IP4_DSLITE |
31 - MTK_PPE_FLOW_CFG_L2_BRIDGE |
32 MTK_PPE_FLOW_CFG_IP4_NAT_FRAG;
33 ppe_w32(ppe, MTK_PPE_FLOW_CFG, val);
34
35 --- a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
36 +++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
37 @@ -32,7 +32,6 @@ static const char *mtk_foe_pkt_type_str(
38 static const char * const type_str[] = {
39 [MTK_PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T",
40 [MTK_PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T",
41 - [MTK_PPE_PKT_TYPE_BRIDGE] = "L2",
42 [MTK_PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE",
43 [MTK_PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T",
44 [MTK_PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T",