git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From 3d483a10327f38595f714f9f9e9dde43a622cb0f Mon Sep 17 00:00:00 2001
   2 From: Heiner Kallweit <hkallweit1@gmail.com>
   3 Date: Sat, 11 Jan 2025 21:49:31 +0100
   4 Subject: [PATCH] net: phy: realtek: add support for reading MDIO_MMD_VEND2
   5  regs on RTL8125/RTL8126
   6
   7 RTL8125/RTL8126 don't support MMD access to the internal PHY, but
   8 provide a mechanism to access at least all MDIO_MMD_VEND2 registers.
   9 By exposing this mechanism standard MMD access functions can be used
  10 to access the MDIO_MMD_VEND2 registers.
  11
  12 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  13 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  14 Link: https://patch.msgid.link/e821b302-5fe6-49ab-aabd-05da500581c0@gmail.com
  15 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  16 ---
  17  drivers/net/phy/realtek.c | 12 ++++++++++--
  18  1 file changed, 10 insertions(+), 2 deletions(-)
  19
  20 --- a/drivers/net/phy/realtek.c
  21 +++ b/drivers/net/phy/realtek.c
  22 @@ -736,7 +736,11 @@ static int rtlgen_read_mmd(struct phy_de
  23  {
  24         int ret;
  25
  26 -       if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
  27 +       if (devnum == MDIO_MMD_VEND2) {
  28 +               rtl821x_write_page(phydev, regnum >> 4);
  29 +               ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
  30 +               rtl821x_write_page(phydev, 0);
  31 +       } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
  32                 rtl821x_write_page(phydev, 0xa5c);
  33                 ret = __phy_read(phydev, 0x12);
  34                 rtl821x_write_page(phydev, 0);
  35 @@ -760,7 +764,11 @@ static int rtlgen_write_mmd(struct phy_d
  36  {
  37         int ret;
  38
  39 -       if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
  40 +       if (devnum == MDIO_MMD_VEND2) {
  41 +               rtl821x_write_page(phydev, regnum >> 4);
  42 +               ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
  43 +               rtl821x_write_page(phydev, 0);
  44 +       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
  45                 rtl821x_write_page(phydev, 0xa5d);
  46                 ret = __phy_write(phydev, 0x10, val);
  47                 rtl821x_write_page(phydev, 0);