2912d7632d5fd5639ab12f78e16f0d34637e233d
[openwrt/staging/ynezz.git] /
1 From 001937cc21a05165530c0775c4646bd04e797658 Mon Sep 17 00:00:00 2001
2 From: Viorel Suman <viorel.suman@nxp.com>
3 Date: Mon, 27 Aug 2018 13:50:17 +0300
4 Subject: [PATCH] MLK-18898-1: ASoC: fsl_sai: select pinctrl state as function
5 of bitclock rate
6
7 Similar to DSD512 case we need a PCM pinctrl state option to map SAI BCLK
8 to codec MCLK pin. Given that bitclock rate is function of slots number and
9 slot width - pass bclk rate as parameter value from SAI driver.
10
11 Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
12 (cherry picked from commit 826caeae32713cff7ad50de8ebc9915de975edd9)
13 ---
14 sound/soc/fsl/fsl_dsd.h | 15 +++++++--------
15 sound/soc/fsl/fsl_sai.c | 24 ++++++++++--------------
16 2 files changed, 17 insertions(+), 22 deletions(-)
17
18 --- a/sound/soc/fsl/fsl_dsd.h
19 +++ b/sound/soc/fsl/fsl_dsd.h
20 @@ -30,23 +30,22 @@ static bool fsl_is_dsd(struct snd_pcm_hw
21 }
22
23 static struct pinctrl_state *fsl_get_pins_state(struct pinctrl *pinctrl,
24 - struct snd_pcm_hw_params *params)
25 + struct snd_pcm_hw_params *params, u32 bclk)
26 {
27 - int dsd_bclk;
28 struct pinctrl_state *state = 0;
29
30 if (fsl_is_dsd(params)) {
31 - dsd_bclk = params_rate(params) * params_physical_width(params);
32 -
33 - switch (dsd_bclk) {
34 - case 22579200: /* DSD512 */
35 + /* DSD512@44.1kHz, DSD512@48kHz */
36 + if (bclk >= 22579200)
37 state = pinctrl_lookup_state(pinctrl, "dsd512");
38 - break;
39 - }
40
41 /* Get default DSD state */
42 if (IS_ERR_OR_NULL(state))
43 state = pinctrl_lookup_state(pinctrl, "dsd");
44 + } else {
45 + /* 706k32b2c, 768k32b2c, etc */
46 + if (bclk >= 45158400)
47 + state = pinctrl_lookup_state(pinctrl, "pcm_b2m");
48 }
49
50 /* Get default state */
51 --- a/sound/soc/fsl/fsl_sai.c
52 +++ b/sound/soc/fsl/fsl_sai.c
53 @@ -620,7 +620,7 @@ static int fsl_sai_hw_params(struct snd_
54 u32 val_cr4 = 0, val_cr5 = 0;
55 u32 slots = (channels == 1) ? 2 : channels;
56 u32 slot_width = word_width;
57 - u32 pins;
58 + u32 pins, bclk;
59 int ret;
60 int i;
61 int trce_mask = 0;
62 @@ -630,9 +630,16 @@ static int fsl_sai_hw_params(struct snd_
63
64 pins = DIV_ROUND_UP(channels, slots);
65 sai->is_dsd = fsl_is_dsd(params);
66 + if (sai->is_dsd)
67 + pins = channels;
68 +
69 + if (sai->slot_width)
70 + slot_width = sai->slot_width;
71 +
72 + bclk = rate*(sai->bitclk_ratio ? sai->bitclk_ratio : slots * slot_width);
73
74 if (!IS_ERR_OR_NULL(sai->pinctrl)) {
75 - sai->pins_state = fsl_get_pins_state(sai->pinctrl, params);
76 + sai->pins_state = fsl_get_pins_state(sai->pinctrl, params, bclk);
77
78 if (!IS_ERR_OR_NULL(sai->pins_state)) {
79 ret = pinctrl_select_state(sai->pinctrl, sai->pins_state);
80 @@ -644,19 +651,8 @@ static int fsl_sai_hw_params(struct snd_
81 }
82 }
83
84 - if (sai->is_dsd)
85 - pins = channels;
86 -
87 - if (sai->slot_width)
88 - slot_width = sai->slot_width;
89 -
90 if (!sai->slave_mode[tx]) {
91 - if (sai->bitclk_ratio)
92 - ret = fsl_sai_set_bclk(cpu_dai, tx,
93 - rate * sai->bitclk_ratio);
94 - else
95 - ret = fsl_sai_set_bclk(cpu_dai, tx,
96 - rate * slots * slot_width);
97 + ret = fsl_sai_set_bclk(cpu_dai, tx, bclk);
98 if (ret)
99 return ret;
100