git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From c9da02bfb1112461e048d3b736afb1873f6f4ccf Mon Sep 17 00:00:00 2001
   2 From: Daniel Golle <daniel@makrotopia.org>
   3 Date: Tue, 27 Sep 2022 16:30:02 +0100
   4 Subject: [PATCH 1/1] net: ethernet: mtk_eth_soc: fix mask of
   5  RX_DMA_GET_SPORT{,_V2}
   6
   7 The bitmasks applied in RX_DMA_GET_SPORT and RX_DMA_GET_SPORT_V2 macros
   8 were swapped. Fix that.
   9
  10 Reported-by: Chen Minqiang <ptpt52@gmail.com>
  11 Fixes: 160d3a9b192985 ("net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support")
  12 Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
  13 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  14 Link: https://lore.kernel.org/r/YzMW+mg9UsaCdKRQ@makrotopia.org
  15 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  16 ---
  17  drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
  18  1 file changed, 2 insertions(+), 2 deletions(-)
  19
  20 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  21 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  22 @@ -315,8 +315,8 @@
  23  #define MTK_RXD5_PPE_CPU_REASON        GENMASK(22, 18)
  24  #define MTK_RXD5_SRC_PORT      GENMASK(29, 26)
  25
  26 -#define RX_DMA_GET_SPORT(x)    (((x) >> 19) & 0xf)
  27 -#define RX_DMA_GET_SPORT_V2(x) (((x) >> 26) & 0x7)
  28 +#define RX_DMA_GET_SPORT(x)    (((x) >> 19) & 0x7)
  29 +#define RX_DMA_GET_SPORT_V2(x) (((x) >> 26) & 0xf)
  30
  31  /* PDMA V2 descriptor rxd3 */
  32  #define RX_DMA_VTAG_V2         BIT(0)