git.openwrt.org Git - openwrt/staging/hauke.git/blob

   1 From de6caac0f49de31d79b487ac1a998f0cfafdd5af Mon Sep 17 00:00:00 2001
   2 From: John Cox <jc@kynesim.co.uk>
   3 Date: Wed, 22 Sep 2021 19:05:30 +0100
   4 Subject: [PATCH] media: rpivid: Ensure IRQs have completed before
   5  uniniting context
   6
   7 Before uniniting the decode context sync with the IRQ queues to ensure
   8 that decode no longer has any buffers in use.  This fixes a problem that
   9 manifested as ffmpeg leaking CMA buffers when it did a stream off on
  10 OUTPUT before CAPTURE, though in reality it was probably much more
  11 dangerous than that.
  12
  13 Signed-off-by: John Cox <jc@kynesim.co.uk>
  14 ---
  15  drivers/staging/media/rpivid/rpivid_h265.c | 58 ++++++++++++++++++++--
  16  1 file changed, 53 insertions(+), 5 deletions(-)
  17
  18 --- a/drivers/staging/media/rpivid/rpivid_h265.c
  19 +++ b/drivers/staging/media/rpivid/rpivid_h265.c
  20 @@ -2387,12 +2387,50 @@ static void dec_state_delete(struct rpiv
  21         kfree(s);
  22  }
  23
  24 -static void rpivid_h265_stop(struct rpivid_ctx *ctx)
  25 +struct irq_sync {
  26 +       atomic_t done;
  27 +       wait_queue_head_t wq;
  28 +       struct rpivid_hw_irq_ent irq_ent;
  29 +};
  30 +
  31 +static void phase2_sync_claimed(struct rpivid_dev *const dev, void *v)
  32  {
  33 -       struct rpivid_dev *const dev = ctx->dev;
  34 -       unsigned int i;
  35 +       struct irq_sync *const sync = v;
  36
  37 -       v4l2_info(&dev->v4l2_dev, "%s\n", __func__);
  38 +       atomic_set(&sync->done, 1);
  39 +       wake_up(&sync->wq);
  40 +}
  41 +
  42 +static void phase1_sync_claimed(struct rpivid_dev *const dev, void *v)
  43 +{
  44 +       struct irq_sync *const sync = v;
  45 +
  46 +       rpivid_hw_irq_active1_enable_claim(dev, 1);
  47 +       rpivid_hw_irq_active2_claim(dev, &sync->irq_ent, phase2_sync_claimed, sync);
  48 +}
  49 +
  50 +/* Sync with IRQ operations
  51 + *
  52 + * Claims phase1 and phase2 in turn and waits for the phase2 claim so any
  53 + * pending IRQ ops will have completed by the time this returns
  54 + *
  55 + * phase1 has counted enables so must reenable once claimed
  56 + * phase2 has unlimited enables
  57 + */
  58 +static void irq_sync(struct rpivid_dev *const dev)
  59 +{
  60 +       struct irq_sync sync;
  61 +
  62 +       atomic_set(&sync.done, 0);
  63 +       init_waitqueue_head(&sync.wq);
  64 +
  65 +       rpivid_hw_irq_active1_claim(dev, &sync.irq_ent, phase1_sync_claimed, &sync);
  66 +       wait_event(sync.wq, atomic_read(&sync.done));
  67 +}
  68 +
  69 +static void h265_ctx_uninit(struct rpivid_dev *const dev, struct rpivid_ctx *ctx)
  70 +{
  71 +       unsigned int i;
  72
  73         dec_env_uninit(ctx);
  74         dec_state_delete(ctx);
  75 @@ -2409,6 +2447,16 @@ static void rpivid_h265_stop(struct rpiv
  76                 gptr_free(dev, ctx->coeff_bufs + i);
  77  }
  78
  79 +static void rpivid_h265_stop(struct rpivid_ctx *ctx)
  80 +{
  81 +       struct rpivid_dev *const dev = ctx->dev;
  82 +
  83 +       v4l2_info(&dev->v4l2_dev, "%s\n", __func__);
  84 +
  85 +       irq_sync(dev);
  86 +       h265_ctx_uninit(dev, ctx);
  87 +}
  88 +
  89  static int rpivid_h265_start(struct rpivid_ctx *ctx)
  90  {
  91         struct rpivid_dev *const dev = ctx->dev;
  92 @@ -2470,7 +2518,7 @@ static int rpivid_h265_start(struct rpiv
  93         return 0;
  94
  95  fail:
  96 -       rpivid_h265_stop(ctx);
  97 +       h265_ctx_uninit(dev, ctx);
  98         return -ENOMEM;
  99  }
 100