git.openwrt.org Git - openwrt/staging/dangole.git/blob

   1 From 33958ad3fc02aeb06a4634e59689a9559d968e1f Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Sat, 26 Feb 2022 14:52:29 +0100
   4 Subject: [PATCH 09/14] clk: qcom: clk-rcg: add clk_rcg_floor_ops ops
   5
   6 Add clk_rcg_floor_ops for clock that can't provide a stable freq and
   7 require to use a floor freq to provide the requested frequency.
   8
   9 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  10 Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  11 Reviewed-by: Stephen Boyd <sboyd@kernel.org>
  12 Tested-by: Jonathan McDowell <noodles@earth.li>
  13 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  14 Link: https://lore.kernel.org/r/20220226135235.10051-10-ansuelsmth@gmail.com
  15 ---
  16  drivers/clk/qcom/clk-rcg.c | 24 ++++++++++++++++++++++++
  17  drivers/clk/qcom/clk-rcg.h |  1 +
  18  2 files changed, 25 insertions(+)
  19
  20 --- a/drivers/clk/qcom/clk-rcg.c
  21 +++ b/drivers/clk/qcom/clk-rcg.c
  22 @@ -526,6 +526,19 @@ static int clk_rcg_set_rate(struct clk_h
  23         return __clk_rcg_set_rate(rcg, f);
  24  }
  25
  26 +static int clk_rcg_set_floor_rate(struct clk_hw *hw, unsigned long rate,
  27 +                                 unsigned long parent_rate)
  28 +{
  29 +       struct clk_rcg *rcg = to_clk_rcg(hw);
  30 +       const struct freq_tbl *f;
  31 +
  32 +       f = qcom_find_freq_floor(rcg->freq_tbl, rate);
  33 +       if (!f)
  34 +               return -EINVAL;
  35 +
  36 +       return __clk_rcg_set_rate(rcg, f);
  37 +}
  38 +
  39  static int clk_rcg_bypass_set_rate(struct clk_hw *hw, unsigned long rate,
  40                                 unsigned long parent_rate)
  41  {
  42 @@ -816,6 +829,17 @@ const struct clk_ops clk_rcg_ops = {
  43  };
  44  EXPORT_SYMBOL_GPL(clk_rcg_ops);
  45
  46 +const struct clk_ops clk_rcg_floor_ops = {
  47 +       .enable = clk_enable_regmap,
  48 +       .disable = clk_disable_regmap,
  49 +       .get_parent = clk_rcg_get_parent,
  50 +       .set_parent = clk_rcg_set_parent,
  51 +       .recalc_rate = clk_rcg_recalc_rate,
  52 +       .determine_rate = clk_rcg_determine_rate,
  53 +       .set_rate = clk_rcg_set_floor_rate,
  54 +};
  55 +EXPORT_SYMBOL_GPL(clk_rcg_floor_ops);
  56 +
  57  const struct clk_ops clk_rcg_bypass_ops = {
  58         .enable = clk_enable_regmap,
  59         .disable = clk_disable_regmap,
  60 --- a/drivers/clk/qcom/clk-rcg.h
  61 +++ b/drivers/clk/qcom/clk-rcg.h
  62 @@ -86,6 +86,7 @@ struct clk_rcg {
  63  };
  64
  65  extern const struct clk_ops clk_rcg_ops;
  66 +extern const struct clk_ops clk_rcg_floor_ops;
  67  extern const struct clk_ops clk_rcg_bypass_ops;
  68  extern const struct clk_ops clk_rcg_bypass2_ops;
  69  extern const struct clk_ops clk_rcg_pixel_ops;