2099d400f24b7a1336cd1c2973fc79eecb8b2ae9
[openwrt/staging/lynxis/omap.git] /
1 From 7d3d85483a6c4085de5c016b86838681e97e6577 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Fri, 20 May 2016 11:31:17 +0800
4 Subject: [PATCH 35/93] armv8: ls1012a: enable two esdhc host controllers
5 support
6
7 LS1012A chip has two esdhc host controllers, and this patch
8 is to enable two controllers support for it.
9
10 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
11 ---
12 .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 +
13 include/configs/ls1012a_common.h | 2 ++
14 2 files changed, 3 insertions(+)
15
16 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
17 index 24add1a..6918757 100644
18 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
19 +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
20 @@ -19,6 +19,7 @@
21 #define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x00400000)
22 #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000)
23 #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000)
24 +#define CONFIG_SYS_FSL_ESDHC_1_ADDR (CONFIG_SYS_IMMR + 0x00580000)
25 #define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000)
26 #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
27 #define CONFIG_SYS_FSL_RST_ADDR (CONFIG_SYS_IMMR + 0x00ee00b0)
28 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
29 index 121824c..89d1370 100644
30 --- a/include/configs/ls1012a_common.h
31 +++ b/include/configs/ls1012a_common.h
32 @@ -94,6 +94,8 @@
33 #ifdef CONFIG_MMC
34 #define CONFIG_CMD_MMC
35 #define CONFIG_FSL_ESDHC
36 +#define CONFIG_FSL_ESDHC_TWO_CONTROLLERS_SUPPORT
37 +#define CONFIG_FSL_ESDHC_1_NON_REMOVABLE_CARD
38 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
39 #define CONFIG_GENERIC_MMC
40 #define CONFIG_CMD_FAT
41 --
42 1.7.9.5
43