1f99de002bbc6beac3f622e67b6caac36d58fdbb
[openwrt/staging/wigyori.git] /
1 From 9033c3c86ea0dd35bd2ab957317573b755967298 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Sun, 30 Oct 2022 18:57:03 +0100
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: pass XO and sleep clocks to GCC
5
6 Pass XO and sleep clocks to the GCC controller so it does not have to
7 find them by matching globaly by name.
8
9 If not passed directly, driver maintains backwards compatibility by then
10 falling back to global lookup.
11
12 Since we are here, set cell numbers in decimal instead of hex.
13
14 Signed-off-by: Robert Marko <robimarko@gmail.com>
15 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
16 Link: https://lore.kernel.org/r/20221030175703.1103224-3-robimarko@gmail.com
17 ---
18 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++--
19 1 file changed, 4 insertions(+), 2 deletions(-)
20
21 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
22 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
23 @@ -361,9 +361,11 @@
24 gcc: gcc@1800000 {
25 compatible = "qcom,gcc-ipq8074";
26 reg = <0x01800000 0x80000>;
27 - #clock-cells = <0x1>;
28 + clocks = <&xo>, <&sleep_clk>;
29 + clock-names = "xo", "sleep_clk";
30 + #clock-cells = <1>;
31 #power-domain-cells = <1>;
32 - #reset-cells = <0x1>;
33 + #reset-cells = <1>;
34 };
35
36 tcsr_mutex: hwlock@1905000 {