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1 From be4512b9ac6fc53e1ca8daccbda84f643215c547 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Thu, 14 Mar 2024 12:28:35 +0300
4 Subject: [PATCH 1/3] net: dsa: mt7530: prevent possible incorrect XTAL
5 frequency selection
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 [ Upstream commit f490c492e946d8ffbe65ad4efc66de3c5ede30a4 ]
11
12 On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit
13 value that represents the frequency of the crystal oscillator connected to
14 the switch IC. The field is populated by the state of the ESW_P4_LED_0 and
15 ESW_P4_LED_0 pins, which is done right after reset is deasserted.
16
17 ESW_P4_LED_0 ESW_P3_LED_0 Frequency
18 -----------------------------------------
19 0 0 Reserved
20 0 1 20MHz
21 1 0 40MHz
22 1 1 25MHz
23
24 On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0
25 pin is used to populate the bit. 25MHz when the pin is high, 40MHz when
26 it's low.
27
28 These pins are also used with LEDs, therefore, their state can be set to
29 something other than the bootstrapping configuration. For example, a link
30 may be established on port 3 before the DSA subdriver takes control of the
31 switch which would set ESW_P3_LED_0 to high.
32
33 Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is
34 described between reset assertion and deassertion. Some switch ICs in real
35 life conditions cannot always have these pins set back to the bootstrapping
36 configuration before reset deassertion in this amount of delay. This causes
37 wrong crystal frequency to be selected which puts the switch in a
38 nonfunctional state after reset deassertion.
39
40 The tests below are conducted on an MT7530 with a 40MHz crystal oscillator
41 by Justin Swartz.
42
43 With a cable from an active peer connected to port 3 before reset, an
44 incorrect crystal frequency (0b11 = 25MHz) is selected:
45
46 [1] [3] [5]
47 : : :
48 _____________________________ __________________
49 ESW_P4_LED_0 |_______|
50 _____________________________
51 ESW_P3_LED_0 |__________________________
52
53 : : : :
54 : : [4]...:
55 : :
56 [2]................:
57
58 [1] Reset is asserted.
59 [2] Period of 1000 - 1100 usec.
60 [3] Reset is deasserted.
61 [4] Period of 315 usec. HWTRAP register is populated with incorrect
62 XTAL frequency.
63 [5] Signals reflect the bootstrapped configuration.
64
65 Increase the delay between reset_control_assert() and
66 reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and
67 gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount
68 ensures a higher possibility that the switch IC will have these pins back
69 to the bootstrapping configuration before reset deassertion.
70
71 With a cable from an active peer connected to port 3 before reset, the
72 correct crystal frequency (0b10 = 40MHz) is selected:
73
74 [1] [2-1] [3] [5]
75 : : : :
76 _____________________________ __________________
77 ESW_P4_LED_0 |_______|
78 ___________________ _______
79 ESW_P3_LED_0 |_________| |__________________
80
81 : : : : :
82 : [2-2]...: [4]...:
83 [2]................:
84
85 [1] Reset is asserted.
86 [2] Period of 5000 - 5100 usec.
87 [2-1] ESW_P3_LED_0 goes low.
88 [2-2] Remaining period of 5000 - 5100 usec.
89 [3] Reset is deasserted.
90 [4] Period of 310 usec. HWTRAP register is populated with bootstrapped
91 XTAL frequency.
92 [5] Signals reflect the bootstrapped configuration.
93
94 ESW_P3_LED_0 low period before reset deassertion:
95
96 5000 usec
97 - 5100 usec
98 TEST RESET HOLD
99 # (usec)
100 ---------------------
101 1 5410
102 2 5440
103 3 4375
104 4 5490
105 5 5475
106 6 4335
107 7 4370
108 8 5435
109 9 4205
110 10 4335
111 11 3750
112 12 3170
113 13 4395
114 14 4375
115 15 3515
116 16 4335
117 17 4220
118 18 4175
119 19 4175
120 20 4350
121
122 Min 3170
123 Max 5490
124
125 Median 4342.500
126 Avg 4466.500
127
128 Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset").
129 Changing the state of pins via reset assertion is simpler and more
130 efficient than doing so by setting the LED controller off.
131
132 Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
133 Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
134 Co-developed-by: Justin Swartz <justin.swartz@risingedge.co.za>
135 Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
136 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
137 Signed-off-by: David S. Miller <davem@davemloft.net>
138 Signed-off-by: Sasha Levin <sashal@kernel.org>
139 ---
140 drivers/net/dsa/mt7530.c | 8 ++++----
141 1 file changed, 4 insertions(+), 4 deletions(-)
142
143 --- a/drivers/net/dsa/mt7530.c
144 +++ b/drivers/net/dsa/mt7530.c
145 @@ -2187,11 +2187,11 @@ mt7530_setup(struct dsa_switch *ds)
146 */
147 if (priv->mcm) {
148 reset_control_assert(priv->rstc);
149 - usleep_range(1000, 1100);
150 + usleep_range(5000, 5100);
151 reset_control_deassert(priv->rstc);
152 } else {
153 gpiod_set_value_cansleep(priv->reset, 0);
154 - usleep_range(1000, 1100);
155 + usleep_range(5000, 5100);
156 gpiod_set_value_cansleep(priv->reset, 1);
157 }
158
159 @@ -2401,11 +2401,11 @@ mt7531_setup(struct dsa_switch *ds)
160 */
161 if (priv->mcm) {
162 reset_control_assert(priv->rstc);
163 - usleep_range(1000, 1100);
164 + usleep_range(5000, 5100);
165 reset_control_deassert(priv->rstc);
166 } else {
167 gpiod_set_value_cansleep(priv->reset, 0);
168 - usleep_range(1000, 1100);
169 + usleep_range(5000, 5100);
170 gpiod_set_value_cansleep(priv->reset, 1);
171 }
172
Staging tree of Sander Vanheule