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   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _PixelGen_SysBlock_defs_h
  16 #define _PixelGen_SysBlock_defs_h
  17
  18 #ifdef ISYS2401_PXG_A
  19 #else
  20 #ifdef ISYS2401_PXG_B
  21 #else
  22 #ifdef ISYS2401_PXG_C
  23 #else
  24 #include <mipi_backend/hrt/include/mipi_backend_defs.h>
  25 #endif
  26 #endif
  27 #endif
  28
  29 /* Parematers and User_Parameters for HSS */
  30 #define _PXG_PPC                       Ppc
  31 #define _PXG_PIXEL_BITS                PixelWidth
  32 #define _PXG_MAX_NOF_SID               MaxNofSids
  33 #define _PXG_DATA_BITS                 DataWidth
  34 #define _PXG_CNT_BITS                  CntWidth
  35 #define _PXG_FIFODEPTH                 FifoDepth
  36 #define _PXG_DBG                       Dbg_device_not_included
  37
  38 /* ID's and Address */
  39 #define _PXG_ADRRESS_ALIGN_REG         4
  40
  41 #define _PXG_COM_ENABLE_REG_IDX        0
  42 #define _PXG_PRBS_RSTVAL_REG0_IDX      1
  43 #define _PXG_PRBS_RSTVAL_REG1_IDX      2
  44 #define _PXG_SYNG_SID_REG_IDX          3
  45 #define _PXG_SYNG_FREE_RUN_REG_IDX     4
  46 #define _PXG_SYNG_PAUSE_REG_IDX        5
  47 #define _PXG_SYNG_NOF_FRAME_REG_IDX    6
  48 #define _PXG_SYNG_NOF_PIXEL_REG_IDX    7
  49 #define _PXG_SYNG_NOF_LINE_REG_IDX     8
  50 #define _PXG_SYNG_HBLANK_CYC_REG_IDX   9
  51 #define _PXG_SYNG_VBLANK_CYC_REG_IDX  10
  52 #define _PXG_SYNG_STAT_HCNT_REG_IDX   11
  53 #define _PXG_SYNG_STAT_VCNT_REG_IDX   12
  54 #define _PXG_SYNG_STAT_FCNT_REG_IDX   13
  55 #define _PXG_SYNG_STAT_DONE_REG_IDX   14
  56 #define _PXG_TPG_MODE_REG_IDX         15
  57 #define _PXG_TPG_HCNT_MASK_REG_IDX    16
  58 #define _PXG_TPG_VCNT_MASK_REG_IDX    17
  59 #define _PXG_TPG_XYCNT_MASK_REG_IDX   18
  60 #define _PXG_TPG_HCNT_DELTA_REG_IDX   19
  61 #define _PXG_TPG_VCNT_DELTA_REG_IDX   20
  62 #define _PXG_TPG_R1_REG_IDX           21
  63 #define _PXG_TPG_G1_REG_IDX           22
  64 #define _PXG_TPG_B1_REG_IDX           23
  65 #define _PXG_TPG_R2_REG_IDX           24
  66 #define _PXG_TPG_G2_REG_IDX           25
  67 #define _PXG_TPG_B2_REG_IDX           26
  68 /* */
  69 #define _PXG_SYNG_PAUSE_CYCLES        0
  70 /* Subblock ID's */
  71 #define _PXG_DISBALE_IDX              0
  72 #define _PXG_PRBS_IDX                 0
  73 #define _PXG_TPG_IDX                  1
  74 #define _PXG_SYNG_IDX                 2
  75 #define _PXG_SMUX_IDX                 3
  76 /* Register Widths */
  77 #define _PXG_COM_ENABLE_REG_WIDTH     2
  78 #define _PXG_COM_SRST_REG_WIDTH       4
  79 #define _PXG_PRBS_RSTVAL_REG0_WIDTH  31
  80 #define _PXG_PRBS_RSTVAL_REG1_WIDTH  31
  81
  82 #define _PXG_SYNG_SID_REG_WIDTH        3
  83
  84 #define _PXG_SYNG_FREE_RUN_REG_WIDTH   1
  85 #define _PXG_SYNG_PAUSE_REG_WIDTH      1
  86 /*
  87 #define _PXG_SYNG_NOF_FRAME_REG_WIDTH  <sync_gen_cnt_width>
  88 #define _PXG_SYNG_NOF_PIXEL_REG_WIDTH  <sync_gen_cnt_width>
  89 #define _PXG_SYNG_NOF_LINE_REG_WIDTH   <sync_gen_cnt_width>
  90 #define _PXG_SYNG_HBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
  91 #define _PXG_SYNG_VBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
  92 #define _PXG_SYNG_STAT_HCNT_REG_WIDTH  <sync_gen_cnt_width>
  93 #define _PXG_SYNG_STAT_VCNT_REG_WIDTH  <sync_gen_cnt_width>
  94 #define _PXG_SYNG_STAT_FCNT_REG_WIDTH  <sync_gen_cnt_width>
  95 */
  96 #define _PXG_SYNG_STAT_DONE_REG_WIDTH  1
  97 #define _PXG_TPG_MODE_REG_WIDTH        2
  98 /*
  99 #define _PXG_TPG_HCNT_MASK_REG_WIDTH   <sync_gen_cnt_width>
 100 #define _PXG_TPG_VCNT_MASK_REG_WIDTH   <sync_gen_cnt_width>
 101 #define _PXG_TPG_XYCNT_MASK_REG_WIDTH  <pixle_width>
 102 */
 103 #define _PXG_TPG_HCNT_DELTA_REG_WIDTH  4
 104 #define _PXG_TPG_VCNT_DELTA_REG_WIDTH  4
 105 /*
 106 #define _PXG_TPG_R1_REG_WIDTH          <pixle_width>
 107 #define _PXG_TPG_G1_REG_WIDTH          <pixle_width>
 108 #define _PXG_TPG_B1_REG_WIDTH          <pixle_width>
 109 #define _PXG_TPG_R2_REG_WIDTH          <pixle_width>
 110 #define _PXG_TPG_G2_REG_WIDTH          <pixle_width>
 111 #define _PXG_TPG_B2_REG_WIDTH          <pixle_width>
 112 */
 113 #define _PXG_FIFO_DEPTH                2
 114 /* MISC */
 115 #define _PXG_ENABLE_REG_VAL            1
 116 #define _PXG_PRBS_ENABLE_REG_VAL       1
 117 #define _PXG_TPG_ENABLE_REG_VAL        2
 118 #define _PXG_SYNG_ENABLE_REG_VAL       4
 119 #define _PXG_FIFO_ENABLE_REG_VAL       8
 120 #define _PXG_PXL_BITS                 14
 121 #define _PXG_INVALID_FLAG              0xDEADBEEF
 122 #define _PXG_CAFE_FLAG                 0xCAFEBABE
 123
 124
 125 #endif /* _PixelGen_SysBlock_defs_h */
 126