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1 From a719f7ba7fcba05d85801c6f0267f389a21627c1 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
3 Date: Fri, 24 Sep 2021 13:03:02 +0200
4 Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver
5 configuration
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Port number is encoded into argument for SMC call. It is zero for SATA,
11 PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY
12 (incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero
13 port number.
14
15 So construct "port" bits for SMC call argument can be constructed directly
16 from PHY type and lane number.
17
18 Change driver code to always pass zero port number for non-ethernet PHYs
19 and for ethernet PHYs determinate port number from lane number. This
20 simplifies the driver.
21
22 As port number from DT PHY configuration is not used anymore, remove whole
23 driver code which parses it. This also simplifies the driver.
24
25 Signed-off-by: Pali Rohár <pali@kernel.org>
26 Signed-off-by: Marek Behún <kabel@kernel.org>
27 Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
28 ---
29 drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 62 +++++++++-----------
30 1 file changed, 29 insertions(+), 33 deletions(-)
31
32 diff --git a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
33 index 6781488cfc58..dbb2d4308851 100644
34 --- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
35 +++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
36 @@ -20,7 +20,6 @@
37 #include <linux/platform_device.h>
38
39 #define MVEBU_A3700_COMPHY_LANES 3
40 -#define MVEBU_A3700_COMPHY_PORTS 2
41
42 /* COMPHY Fast SMC function identifiers */
43 #define COMPHY_SIP_POWER_ON 0x82000001
44 @@ -45,51 +44,47 @@
45 #define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \
46 ((idx) << 8) | \
47 ((speed) << 2))
48 -#define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \
49 +#define COMPHY_FW_PCIE(mode, speed, width) (COMPHY_FW_NET(mode, 0, speed) | \
50 ((width) << 18))
51
52 struct mvebu_a3700_comphy_conf {
53 unsigned int lane;
54 enum phy_mode mode;
55 int submode;
56 - unsigned int port;
57 u32 fw_mode;
58 };
59
60 -#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \
61 +#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _fw) \
62 { \
63 .lane = _lane, \
64 .mode = _mode, \
65 .submode = _smode, \
66 - .port = _port, \
67 .fw_mode = _fw, \
68 }
69
70 -#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \
71 - MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw)
72 +#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _fw) \
73 + MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _fw)
74
75 -#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \
76 - MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw)
77 +#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _fw) \
78 + MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _fw)
79
80 static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = {
81 /* lane 0 */
82 - MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0,
83 + MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS,
84 COMPHY_FW_MODE_USB3H),
85 - MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1,
86 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII,
87 COMPHY_FW_MODE_SGMII),
88 - MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1,
89 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX,
90 COMPHY_FW_MODE_2500BASEX),
91 /* lane 1 */
92 - MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0,
93 - COMPHY_FW_MODE_PCIE),
94 - MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0,
95 + MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE),
96 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII,
97 COMPHY_FW_MODE_SGMII),
98 - MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0,
99 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX,
100 COMPHY_FW_MODE_2500BASEX),
101 /* lane 2 */
102 - MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0,
103 - COMPHY_FW_MODE_SATA),
104 - MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0,
105 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, COMPHY_FW_MODE_SATA),
106 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS,
107 COMPHY_FW_MODE_USB3H),
108 };
109
110 @@ -98,7 +93,6 @@ struct mvebu_a3700_comphy_lane {
111 unsigned int id;
112 enum phy_mode mode;
113 int submode;
114 - int port;
115 };
116
117 static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane,
118 @@ -120,7 +114,7 @@ static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane,
119 }
120 }
121
122 -static int mvebu_a3700_comphy_get_fw_mode(int lane, int port,
123 +static int mvebu_a3700_comphy_get_fw_mode(int lane,
124 enum phy_mode mode,
125 int submode)
126 {
127 @@ -132,7 +126,6 @@ static int mvebu_a3700_comphy_get_fw_mode(int lane, int port,
128
129 for (i = 0; i < n; i++) {
130 if (mvebu_a3700_comphy_modes[i].lane == lane &&
131 - mvebu_a3700_comphy_modes[i].port == port &&
132 mvebu_a3700_comphy_modes[i].mode == mode &&
133 mvebu_a3700_comphy_modes[i].submode == submode)
134 break;
135 @@ -153,7 +146,7 @@ static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode,
136 if (submode == PHY_INTERFACE_MODE_1000BASEX)
137 submode = PHY_INTERFACE_MODE_SGMII;
138
139 - fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode,
140 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, mode,
141 submode);
142 if (fw_mode < 0) {
143 dev_err(lane->dev, "invalid COMPHY mode\n");
144 @@ -172,9 +165,10 @@ static int mvebu_a3700_comphy_power_on(struct phy *phy)
145 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy);
146 u32 fw_param;
147 int fw_mode;
148 + int fw_port;
149 int ret;
150
151 - fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port,
152 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id,
153 lane->mode, lane->submode);
154 if (fw_mode < 0) {
155 dev_err(lane->dev, "invalid COMPHY mode\n");
156 @@ -191,17 +185,18 @@ static int mvebu_a3700_comphy_power_on(struct phy *phy)
157 fw_param = COMPHY_FW_MODE(fw_mode);
158 break;
159 case PHY_MODE_ETHERNET:
160 + fw_port = (lane->id == 0) ? 1 : 0;
161 switch (lane->submode) {
162 case PHY_INTERFACE_MODE_SGMII:
163 dev_dbg(lane->dev, "set lane %d to SGMII mode\n",
164 lane->id);
165 - fw_param = COMPHY_FW_NET(fw_mode, lane->port,
166 + fw_param = COMPHY_FW_NET(fw_mode, fw_port,
167 COMPHY_FW_SPEED_1_25G);
168 break;
169 case PHY_INTERFACE_MODE_2500BASEX:
170 dev_dbg(lane->dev, "set lane %d to 2500BASEX mode\n",
171 lane->id);
172 - fw_param = COMPHY_FW_NET(fw_mode, lane->port,
173 + fw_param = COMPHY_FW_NET(fw_mode, fw_port,
174 COMPHY_FW_SPEED_3_125G);
175 break;
176 default:
177 @@ -212,8 +207,7 @@ static int mvebu_a3700_comphy_power_on(struct phy *phy)
178 break;
179 case PHY_MODE_PCIE:
180 dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id);
181 - fw_param = COMPHY_FW_PCIE(fw_mode, lane->port,
182 - COMPHY_FW_SPEED_5G,
183 + fw_param = COMPHY_FW_PCIE(fw_mode, COMPHY_FW_SPEED_5G,
184 phy->attrs.bus_width);
185 break;
186 default:
187 @@ -247,17 +241,20 @@ static struct phy *mvebu_a3700_comphy_xlate(struct device *dev,
188 struct of_phandle_args *args)
189 {
190 struct mvebu_a3700_comphy_lane *lane;
191 + unsigned int port;
192 struct phy *phy;
193
194 - if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS))
195 - return ERR_PTR(-EINVAL);
196 -
197 phy = of_phy_simple_xlate(dev, args);
198 if (IS_ERR(phy))
199 return phy;
200
201 lane = phy_get_drvdata(phy);
202 - lane->port = args->args[0];
203 +
204 + port = args->args[0];
205 + if (port != 0 && (port != 1 || lane->id != 0)) {
206 + dev_err(lane->dev, "invalid port number %u\n", port);
207 + return ERR_PTR(-EINVAL);
208 + }
209
210 return phy;
211 }
212 @@ -302,7 +299,6 @@ static int mvebu_a3700_comphy_probe(struct platform_device *pdev)
213 lane->mode = PHY_MODE_INVALID;
214 lane->submode = PHY_INTERFACE_MODE_NA;
215 lane->id = lane_id;
216 - lane->port = -1;
217 phy_set_drvdata(phy, lane);
218 }
219
220 --
221 2.34.1
222
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