git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From e870793b277eeaf3c455971d9610f039fd9ab160 Mon Sep 17 00:00:00 2001
   2 From: Vladimir Oltean <vladimir.oltean@nxp.com>
   3 Date: Thu, 14 Nov 2019 17:03:23 +0200
   4 Subject: [PATCH] net: mscc: ocelot: create a helper for changing the port MTU
   5
   6 Since in an NPI/DSA setup, not all ports will have the same MTU, we need
   7 to make sure the watermarks for pause frames and/or tail dropping logic
   8 that existed in the driver is still coherent for the new MTU values.
   9
  10 We need to do this because the NPI (aka external CPU) port needs an
  11 increased MTU for the DSA tag. This will be done in a future patch.
  12
  13 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
  14 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  15 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
  16 Signed-off-by: David S. Miller <davem@davemloft.net>
  17 ---
  18  drivers/net/ethernet/mscc/ocelot.c | 40 ++++++++++++++++++++++----------------
  19  1 file changed, 23 insertions(+), 17 deletions(-)
  20
  21 --- a/drivers/net/ethernet/mscc/ocelot.c
  22 +++ b/drivers/net/ethernet/mscc/ocelot.c
  23 @@ -2101,11 +2101,32 @@ static int ocelot_init_timestamp(struct
  24         return 0;
  25  }
  26
  27 -static void ocelot_init_port(struct ocelot *ocelot, int port)
  28 +static void ocelot_port_set_mtu(struct ocelot *ocelot, int port, size_t mtu)
  29  {
  30         struct ocelot_port *ocelot_port = ocelot->ports[port];
  31         int atop_wm;
  32
  33 +       ocelot_port_writel(ocelot_port, mtu, DEV_MAC_MAXLEN_CFG);
  34 +
  35 +       /* Set Pause WM hysteresis
  36 +        * 152 = 6 * mtu / OCELOT_BUFFER_CELL_SZ
  37 +        * 101 = 4 * mtu / OCELOT_BUFFER_CELL_SZ
  38 +        */
  39 +       ocelot_write_rix(ocelot, SYS_PAUSE_CFG_PAUSE_ENA |
  40 +                        SYS_PAUSE_CFG_PAUSE_STOP(101) |
  41 +                        SYS_PAUSE_CFG_PAUSE_START(152), SYS_PAUSE_CFG, port);
  42 +
  43 +       /* Tail dropping watermark */
  44 +       atop_wm = (ocelot->shared_queue_sz - 9 * mtu) / OCELOT_BUFFER_CELL_SZ;
  45 +       ocelot_write_rix(ocelot, ocelot_wm_enc(9 * mtu),
  46 +                        SYS_ATOP, port);
  47 +       ocelot_write(ocelot, ocelot_wm_enc(atop_wm), SYS_ATOP_TOT_CFG);
  48 +}
  49 +
  50 +static void ocelot_init_port(struct ocelot *ocelot, int port)
  51 +{
  52 +       struct ocelot_port *ocelot_port = ocelot->ports[port];
  53 +
  54         INIT_LIST_HEAD(&ocelot_port->skbs);
  55
  56         /* Basic L2 initialization */
  57 @@ -2126,8 +2147,7 @@ static void ocelot_init_port(struct ocel
  58                            DEV_MAC_HDX_CFG);
  59
  60         /* Set Max Length and maximum tags allowed */
  61 -       ocelot_port_writel(ocelot_port, VLAN_ETH_FRAME_LEN,
  62 -                          DEV_MAC_MAXLEN_CFG);
  63 +       ocelot_port_set_mtu(ocelot, port, VLAN_ETH_FRAME_LEN);
  64         ocelot_port_writel(ocelot_port, DEV_MAC_TAGS_CFG_TAG_ID(ETH_P_8021AD) |
  65                            DEV_MAC_TAGS_CFG_VLAN_AWR_ENA |
  66                            DEV_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA,
  67 @@ -2137,20 +2157,6 @@ static void ocelot_init_port(struct ocel
  68         ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_HIGH_CFG);
  69         ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_LOW_CFG);
  70
  71 -       /* Set Pause WM hysteresis
  72 -        * 152 = 6 * VLAN_ETH_FRAME_LEN / OCELOT_BUFFER_CELL_SZ
  73 -        * 101 = 4 * VLAN_ETH_FRAME_LEN / OCELOT_BUFFER_CELL_SZ
  74 -        */
  75 -       ocelot_write_rix(ocelot, SYS_PAUSE_CFG_PAUSE_ENA |
  76 -                        SYS_PAUSE_CFG_PAUSE_STOP(101) |
  77 -                        SYS_PAUSE_CFG_PAUSE_START(152), SYS_PAUSE_CFG, port);
  78 -
  79 -       /* Tail dropping watermark */
  80 -       atop_wm = (ocelot->shared_queue_sz - 9 * VLAN_ETH_FRAME_LEN) / OCELOT_BUFFER_CELL_SZ;
  81 -       ocelot_write_rix(ocelot, ocelot_wm_enc(9 * VLAN_ETH_FRAME_LEN),
  82 -                        SYS_ATOP, port);
  83 -       ocelot_write(ocelot, ocelot_wm_enc(atop_wm), SYS_ATOP_TOT_CFG);
  84 -
  85         /* Drop frames with multicast source address */
  86         ocelot_rmw_gix(ocelot, ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
  87                        ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,