git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 599e7165ec6477139dae4f32a12e8d49d5dd8859 Mon Sep 17 00:00:00 2001
   2 From: Eric Anholt <eric@anholt.net>
   3 Date: Mon, 9 May 2016 17:28:18 -0700
   4 Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
   5
   6 These divide off of PLLD_PER and are used for the ethernet and wifi
   7 PHYs source PLLs.  Neither of them is currently represented by a phy
   8 device that would grab the clock for us.
   9
  10 This keeps other drivers from killing the networking PHYs when they
  11 disable their own clocks and trigger PLLD_PER's refcount going to 0.
  12
  13 v2: Skip marking as critical if they aren't on at boot.
  14
  15 Signed-off-by: Eric Anholt <eric@anholt.net>
  16 ---
  17  drivers/clk/bcm/clk-bcm2835.c | 9 +++++++++
  18  1 file changed, 9 insertions(+)
  19
  20 --- a/drivers/clk/bcm/clk-bcm2835.c
  21 +++ b/drivers/clk/bcm/clk-bcm2835.c
  22 @@ -1266,6 +1266,15 @@ static struct clk_hw *bcm2835_register_c
  23         init.name = data->name;
  24         init.flags = data->flags | CLK_IGNORE_UNUSED;
  25
  26 +       /*
  27 +        * Some GPIO clocks for ethernet/wifi PLLs are marked as
  28 +        * critical (since some platforms use them), but if the
  29 +        * firmware didn't have them turned on then they clearly
  30 +        * aren't actually critical.
  31 +        */
  32 +       if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
  33 +               init.flags &= ~CLK_IS_CRITICAL;
  34 +
  35         if (data->is_vpu_clock) {
  36                 init.ops = &bcm2835_vpu_clock_clk_ops;
  37         } else {