12c3221077ca7cafcdbf47f38fe87cde521730a8
[openwrt/staging/stintel.git] /
1 From 8255212e4130bd2dc1463286a3dddb74797bbdc1 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Sat, 16 Apr 2022 01:30:14 +0200
4 Subject: [PATCH 3/6] net: dsa: qca8k: rework and simplify mdiobus logic
5
6 In an attempt to reduce qca8k_priv space, rework and simplify mdiobus
7 logic.
8 We now declare a mdiobus instead of relying on DSA phy_read/write even
9 if a mdio node is not present. This is all to make the qca8k ops static
10 and not switch specific. With a legacy implementation where port doesn't
11 have a phy map declared in the dts with a mdio node, we declare a
12 'qca8k-legacy' mdiobus. The conversion logic is used as legacy read and
13 write ops are used instead of the internal one.
14 Also drop the legacy_phy_port_mapping as we now declare mdiobus with ops
15 that already address the workaround.
16
17 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
18 Signed-off-by: David S. Miller <davem@davemloft.net>
19 ---
20 drivers/net/dsa/qca8k.c | 95 +++++++++++++----------------------------
21 drivers/net/dsa/qca8k.h | 1 -
22 2 files changed, 29 insertions(+), 67 deletions(-)
23
24 --- a/drivers/net/dsa/qca8k.c
25 +++ b/drivers/net/dsa/qca8k.c
26 @@ -1291,83 +1291,63 @@ qca8k_internal_mdio_read(struct mii_bus
27 }
28
29 static int
30 -qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data)
31 +qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data)
32 {
33 - struct qca8k_priv *priv = ds->priv;
34 - int ret;
35 + port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
36
37 - /* Check if the legacy mapping should be used and the
38 - * port is not correctly mapped to the right PHY in the
39 - * devicetree
40 - */
41 - if (priv->legacy_phy_port_mapping)
42 - port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
43 -
44 - /* Use mdio Ethernet when available, fallback to legacy one on error */
45 - ret = qca8k_phy_eth_command(priv, false, port, regnum, 0);
46 - if (!ret)
47 - return ret;
48 -
49 - return qca8k_mdio_write(priv, port, regnum, data);
50 + return qca8k_internal_mdio_write(slave_bus, port, regnum, data);
51 }
52
53 static int
54 -qca8k_phy_read(struct dsa_switch *ds, int port, int regnum)
55 +qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum)
56 {
57 - struct qca8k_priv *priv = ds->priv;
58 - int ret;
59 -
60 - /* Check if the legacy mapping should be used and the
61 - * port is not correctly mapped to the right PHY in the
62 - * devicetree
63 - */
64 - if (priv->legacy_phy_port_mapping)
65 - port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
66 -
67 - /* Use mdio Ethernet when available, fallback to legacy one on error */
68 - ret = qca8k_phy_eth_command(priv, true, port, regnum, 0);
69 - if (ret >= 0)
70 - return ret;
71 -
72 - ret = qca8k_mdio_read(priv, port, regnum);
73 -
74 - if (ret < 0)
75 - return 0xffff;
76 + port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
77
78 - return ret;
79 + return qca8k_internal_mdio_read(slave_bus, port, regnum);
80 }
81
82 static int
83 -qca8k_mdio_register(struct qca8k_priv *priv, struct device_node *mdio)
84 +qca8k_mdio_register(struct qca8k_priv *priv)
85 {
86 struct dsa_switch *ds = priv->ds;
87 + struct device_node *mdio;
88 struct mii_bus *bus;
89
90 bus = devm_mdiobus_alloc(ds->dev);
91 -
92 if (!bus)
93 return -ENOMEM;
94
95 bus->priv = (void *)priv;
96 - bus->name = "qca8k slave mii";
97 - bus->read = qca8k_internal_mdio_read;
98 - bus->write = qca8k_internal_mdio_write;
99 - snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d",
100 - ds->index);
101 -
102 bus->parent = ds->dev;
103 bus->phy_mask = ~ds->phys_mii_mask;
104 -
105 ds->slave_mii_bus = bus;
106
107 - return devm_of_mdiobus_register(priv->dev, bus, mdio);
108 + /* Check if the devicetree declare the port:phy mapping */
109 + mdio = of_get_child_by_name(priv->dev->of_node, "mdio");
110 + if (of_device_is_available(mdio)) {
111 + snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d", ds->index);
112 + bus->name = "qca8k slave mii";
113 + bus->read = qca8k_internal_mdio_read;
114 + bus->write = qca8k_internal_mdio_write;
115 + return devm_of_mdiobus_register(priv->dev, bus, mdio);
116 + }
117 +
118 + /* If a mapping can't be found the legacy mapping is used,
119 + * using the qca8k_port_to_phy function
120 + */
121 + snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d",
122 + ds->dst->index, ds->index);
123 + bus->name = "qca8k-legacy slave mii";
124 + bus->read = qca8k_legacy_mdio_read;
125 + bus->write = qca8k_legacy_mdio_write;
126 + return devm_mdiobus_register(priv->dev, bus);
127 }
128
129 static int
130 qca8k_setup_mdio_bus(struct qca8k_priv *priv)
131 {
132 u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg;
133 - struct device_node *ports, *port, *mdio;
134 + struct device_node *ports, *port;
135 phy_interface_t mode;
136 int err;
137
138 @@ -1429,24 +1409,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
139 QCA8K_MDIO_MASTER_EN);
140 }
141
142 - /* Check if the devicetree declare the port:phy mapping */
143 - mdio = of_get_child_by_name(priv->dev->of_node, "mdio");
144 - if (of_device_is_available(mdio)) {
145 - err = qca8k_mdio_register(priv, mdio);
146 - if (err)
147 - of_node_put(mdio);
148 -
149 - return err;
150 - }
151 -
152 - /* If a mapping can't be found the legacy mapping is used,
153 - * using the qca8k_port_to_phy function
154 - */
155 - priv->legacy_phy_port_mapping = true;
156 - priv->ops.phy_read = qca8k_phy_read;
157 - priv->ops.phy_write = qca8k_phy_write;
158 -
159 - return 0;
160 + return qca8k_mdio_register(priv);
161 }
162
163 static int
164 --- a/drivers/net/dsa/qca8k.h
165 +++ b/drivers/net/dsa/qca8k.h
166 @@ -382,7 +382,6 @@ struct qca8k_priv {
167 * Bit 1: port enabled. Bit 0: port disabled.
168 */
169 u8 port_enabled_map;
170 - bool legacy_phy_port_mapping;
171 struct qca8k_ports_config ports_config;
172 struct regmap *regmap;
173 struct mii_bus *bus;