git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From d235e65adf00f6db09331874c5a987b7fe18023b Mon Sep 17 00:00:00 2001
   2 From: Hugh Cole-Baker <sigmaris@gmail.com>
   3 Date: Tue, 9 Jan 2024 20:27:28 +0000
   4 Subject: [PATCH] arm64: dts: rockchip: enable NanoPC-T6 MiniPCIe power
   5
   6 The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE
   7 modem. This slot has no PCIe functionality, only USB 2.0 pins are wired
   8 to the SoC, and USIM pins are wired to a SIM card slot on the board.
   9 Define the 3.3v supply for the slot so it can be used.
  10
  11 Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
  12 Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.com
  13 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  14 ---
  15  arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 17 +++++++++++++++++
  16  1 file changed, 17 insertions(+)
  17
  18 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
  19 +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
  20 @@ -159,6 +159,18 @@
  21                 regulator-max-microvolt = <3300000>;
  22                 vin-supply = <&vcc5v0_sys>;
  23         };
  24 +
  25 +       vdd_4g_3v3: vdd-4g-3v3-regulator {
  26 +               compatible = "regulator-fixed";
  27 +               enable-active-high;
  28 +               gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
  29 +               pinctrl-names = "default";
  30 +               pinctrl-0 = <&pin_4g_lte_pwren>;
  31 +               regulator-name = "vdd_4g_3v3";
  32 +               regulator-min-microvolt = <3300000>;
  33 +               regulator-max-microvolt = <3300000>;
  34 +               vin-supply = <&vcc5v0_sys>;
  35 +       };
  36  };
  37
  38  &combphy0_ps {
  39 @@ -504,6 +516,10 @@
  40         };
  41
  42         usb {
  43 +               pin_4g_lte_pwren: 4g-lte-pwren {
  44 +                       rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
  45 +               };
  46 +
  47                 typec5v_pwren: typec5v-pwren {
  48                         rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  49                 };
  50 @@ -884,6 +900,7 @@
  51  };
  52
  53  &u2phy2_host {
  54 +       phy-supply = <&vdd_4g_3v3>;
  55         status = "okay";
  56  };
  57