1 From 5f6c08984a6578201fe3a2394ccb0d3a30fdf027 Mon Sep 17 00:00:00 2001
2 From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
3 Date: Tue, 22 Oct 2019 12:26:52 -0300
4 Subject: [PATCH] media: v4l: Add definitions for HEVC stateless
7 This introduces the required definitions for HEVC decoding support with
8 stateless VPUs. The controls associated to the HEVC slice format provide
9 the required meta-data for decoding slices extracted from the bitstream.
11 They are not exported to the public V4L2 API since reworking this API
12 will likely be needed for covering various use-cases and new hardware.
14 Multi-slice decoding is exposed as a valid decoding mode to match current
15 H.264 support but it is not yet implemented.
17 The interface comes with the following limitations:
18 * No custom quantization matrices (scaling lists);
19 * Support for a single temporal layer only;
20 * No slice entry point offsets support;
21 * No conformance window support;
22 * No VUI parameters support;
23 * No support for SPS extensions: range, multilayer, 3d, scc, 4 bits;
24 * No support for PPS extensions: range, multilayer, 3d, scc, 4 bits.
26 Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
27 [hverkuil-cisco@xs4all.nl: use 1ULL in flags defines in hevc-ctrls.h]
28 Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
29 Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
31 Documentation/media/uapi/v4l/biblio.rst | 9 +
32 .../media/uapi/v4l/ext-ctrls-codec.rst | 553 +++++++++++++++++-
33 .../media/uapi/v4l/vidioc-queryctrl.rst | 18 +
34 .../media/videodev2.h.rst.exceptions | 3 +
35 drivers/media/v4l2-core/v4l2-ctrls.c | 109 +++-
36 drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
37 include/media/hevc-ctrls.h | 212 +++++++
38 include/media/v4l2-ctrls.h | 7 +
39 8 files changed, 908 insertions(+), 4 deletions(-)
40 create mode 100644 include/media/hevc-ctrls.h
42 --- a/Documentation/media/uapi/v4l/biblio.rst
43 +++ b/Documentation/media/uapi/v4l/biblio.rst
44 @@ -131,6 +131,15 @@ ITU-T Rec. H.264 Specification (04/2017
46 :author: International Telecommunication Union (http://www.itu.ch)
53 +:title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"
55 +:author: International Telecommunication Union (http://www.itu.ch), International Organisation for Standardisation (http://www.iso.ch)
60 --- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
61 +++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
62 @@ -1983,9 +1983,9 @@ enum v4l2_mpeg_video_h264_hierarchical_c
64 - Timestamp of the V4L2 capture buffer to use as reference, used
65 with B-coded and P-coded frames. The timestamp refers to the
66 - ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
67 - :c:func:`v4l2_timeval_to_ns()` function to convert the struct
68 - :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
69 + ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
70 + :c:func:`v4l2_timeval_to_ns()` function to convert the struct
71 + :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
75 @@ -3693,3 +3693,550 @@ enum v4l2_mpeg_video_hevc_size_of_length
76 Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
77 disables generating SPS and PPS at every IDR. Setting it to one enables
78 generating SPS and PPS at every IDR.
82 +``V4L2_CID_MPEG_VIDEO_HEVC_SPS (struct)``
83 + Specifies the Sequence Parameter Set fields (as extracted from the
84 + bitstream) for the associated HEVC slice data.
85 + These bitstream parameters are defined according to :ref:`hevc`.
86 + They are described in section 7.4.3.2 "Sequence parameter set RBSP
87 + semantics" of the specification.
89 +.. c:type:: v4l2_ctrl_hevc_sps
91 +.. cssclass:: longtable
93 +.. flat-table:: struct v4l2_ctrl_hevc_sps
99 + - ``pic_width_in_luma_samples``
102 + - ``pic_height_in_luma_samples``
105 + - ``bit_depth_luma_minus8``
108 + - ``bit_depth_chroma_minus8``
111 + - ``log2_max_pic_order_cnt_lsb_minus4``
114 + - ``sps_max_dec_pic_buffering_minus1``
117 + - ``sps_max_num_reorder_pics``
120 + - ``sps_max_latency_increase_plus1``
123 + - ``log2_min_luma_coding_block_size_minus3``
126 + - ``log2_diff_max_min_luma_coding_block_size``
129 + - ``log2_min_luma_transform_block_size_minus2``
132 + - ``log2_diff_max_min_luma_transform_block_size``
135 + - ``max_transform_hierarchy_depth_inter``
138 + - ``max_transform_hierarchy_depth_intra``
141 + - ``pcm_sample_bit_depth_luma_minus1``
144 + - ``pcm_sample_bit_depth_chroma_minus1``
147 + - ``log2_min_pcm_luma_coding_block_size_minus3``
150 + - ``log2_diff_max_min_pcm_luma_coding_block_size``
153 + - ``num_short_term_ref_pic_sets``
156 + - ``num_long_term_ref_pics_sps``
159 + - ``chroma_format_idc``
163 + - See :ref:`Sequence Parameter Set Flags <hevc_sps_flags>`
167 +``Sequence Parameter Set Flags``
169 +.. cssclass:: longtable
176 + * - ``V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE``
179 + * - ``V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED``
182 + * - ``V4L2_HEVC_SPS_FLAG_AMP_ENABLED``
185 + * - ``V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET``
188 + * - ``V4L2_HEVC_SPS_FLAG_PCM_ENABLED``
191 + * - ``V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED``
194 + * - ``V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT``
197 + * - ``V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED``
200 + * - ``V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED``
204 +``V4L2_CID_MPEG_VIDEO_HEVC_PPS (struct)``
205 + Specifies the Picture Parameter Set fields (as extracted from the
206 + bitstream) for the associated HEVC slice data.
207 + These bitstream parameters are defined according to :ref:`hevc`.
208 + They are described in section 7.4.3.3 "Picture parameter set RBSP
209 + semantics" of the specification.
211 +.. c:type:: v4l2_ctrl_hevc_pps
213 +.. cssclass:: longtable
215 +.. flat-table:: struct v4l2_ctrl_hevc_pps
221 + - ``num_extra_slice_header_bits``
224 + - ``init_qp_minus26``
227 + - ``diff_cu_qp_delta_depth``
230 + - ``pps_cb_qp_offset``
233 + - ``pps_cr_qp_offset``
236 + - ``num_tile_columns_minus1``
239 + - ``num_tile_rows_minus1``
242 + - ``column_width_minus1[20]``
245 + - ``row_height_minus1[22]``
248 + - ``pps_beta_offset_div2``
251 + - ``pps_tc_offset_div2``
254 + - ``log2_parallel_merge_level_minus2``
258 + - Applications and drivers must set this to zero.
261 + - See :ref:`Picture Parameter Set Flags <hevc_pps_flags>`
265 +``Picture Parameter Set Flags``
267 +.. cssclass:: longtable
274 + * - ``V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT``
277 + * - ``V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT``
280 + * - ``V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED``
283 + * - ``V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT``
286 + * - ``V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED``
289 + * - ``V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED``
292 + * - ``V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED``
295 + * - ``V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT``
298 + * - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED``
301 + * - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED``
304 + * - ``V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED``
307 + * - ``V4L2_HEVC_PPS_FLAG_TILES_ENABLED``
310 + * - ``V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED``
313 + * - ``V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED``
316 + * - ``V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED``
319 + * - ``V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED``
322 + * - ``V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER``
325 + * - ``V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT``
328 + * - ``V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT``
332 +``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (struct)``
333 + Specifies various slice-specific parameters, especially from the NAL unit
334 + header, general slice segment header and weighted prediction parameter
335 + parts of the bitstream.
336 + These bitstream parameters are defined according to :ref:`hevc`.
337 + They are described in section 7.4.7 "General slice segment header
338 + semantics" of the specification.
340 +.. c:type:: v4l2_ctrl_hevc_slice_params
342 +.. cssclass:: longtable
344 +.. flat-table:: struct v4l2_ctrl_hevc_slice_params
351 + - Size (in bits) of the current slice data.
353 + - ``data_bit_offset``
354 + - Offset (in bits) to the video data in the current slice data.
356 + - ``nal_unit_type``
359 + - ``nuh_temporal_id_plus1``
364 + (V4L2_HEVC_SLICE_TYPE_I, V4L2_HEVC_SLICE_TYPE_P or
365 + V4L2_HEVC_SLICE_TYPE_B).
367 + - ``colour_plane_id``
370 + - ``slice_pic_order_cnt``
373 + - ``num_ref_idx_l0_active_minus1``
376 + - ``num_ref_idx_l1_active_minus1``
379 + - ``collocated_ref_idx``
382 + - ``five_minus_max_num_merge_cand``
385 + - ``slice_qp_delta``
388 + - ``slice_cb_qp_offset``
391 + - ``slice_cr_qp_offset``
394 + - ``slice_act_y_qp_offset``
397 + - ``slice_act_cb_qp_offset``
400 + - ``slice_act_cr_qp_offset``
403 + - ``slice_beta_offset_div2``
406 + - ``slice_tc_offset_div2``
412 + - ``num_active_dpb_entries``
413 + - The number of entries in ``dpb``.
415 + - ``ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
416 + - The list of L0 reference elements as indices in the DPB.
418 + - ``ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
419 + - The list of L1 reference elements as indices in the DPB.
421 + - ``num_rps_poc_st_curr_before``
422 + - The number of reference pictures in the short-term set that come before
425 + - ``num_rps_poc_st_curr_after``
426 + - The number of reference pictures in the short-term set that come after
429 + - ``num_rps_poc_lt_curr``
430 + - The number of reference pictures in the long-term set.
433 + - Applications and drivers must set this to zero.
434 + * - struct :c:type:`v4l2_hevc_dpb_entry`
435 + - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
436 + - The decoded picture buffer, for meta-data about reference frames.
437 + * - struct :c:type:`v4l2_hevc_pred_weight_table`
438 + - ``pred_weight_table``
439 + - The prediction weight coefficients for inter-picture prediction.
442 + - See :ref:`Slice Parameters Flags <hevc_slice_params_flags>`
444 +.. _hevc_slice_params_flags:
446 +``Slice Parameters Flags``
448 +.. cssclass:: longtable
455 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA``
458 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA``
461 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED``
464 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO``
467 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT``
470 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0``
473 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV``
476 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED``
479 + * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED``
483 +.. c:type:: v4l2_hevc_dpb_entry
485 +.. cssclass:: longtable
487 +.. flat-table:: struct v4l2_hevc_dpb_entry
494 + - Timestamp of the V4L2 capture buffer to use as reference, used
495 + with B-coded and P-coded frames. The timestamp refers to the
496 + ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
497 + :c:func:`v4l2_timeval_to_ns()` function to convert the struct
498 + :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
501 + - The reference set for the reference frame
502 + (V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_BEFORE,
503 + V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_AFTER or
504 + V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR)
507 + - Whether the reference is a field picture or a frame.
509 + - ``pic_order_cnt[2]``
510 + - The picture order count of the reference. Only the first element of the
511 + array is used for frame pictures, while the first element identifies the
512 + top field and the second the bottom field in field-coded pictures.
515 + - Applications and drivers must set this to zero.
517 +.. c:type:: v4l2_hevc_pred_weight_table
519 +.. cssclass:: longtable
521 +.. flat-table:: struct v4l2_hevc_pred_weight_table
527 + - ``luma_log2_weight_denom``
530 + - ``delta_chroma_log2_weight_denom``
533 + - ``delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
536 + - ``luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
539 + - ``delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
542 + - ``chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
545 + - ``delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
548 + - ``luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
551 + - ``delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
554 + - ``chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
558 + - Applications and drivers must set this to zero.
560 +``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)``
561 + Specifies the decoding mode to use. Currently exposes slice-based and
562 + frame-based decoding but new modes might be added later on.
563 + This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
564 + pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
565 + are required to set this control in order to specify the decoding mode
566 + that is expected for the buffer.
567 + Drivers may expose a single or multiple decoding modes, depending
568 + on what they can support.
572 + This menu control is not yet part of the public kernel API and
573 + it is expected to change.
575 +.. c:type:: v4l2_mpeg_video_hevc_decode_mode
577 +.. cssclass:: longtable
584 + * - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED``
586 + - Decoding is done at the slice granularity.
587 + The OUTPUT buffer must contain a single slice.
588 + * - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_FRAME_BASED``
590 + - Decoding is done at the frame granularity.
591 + The OUTPUT buffer must contain all slices needed to decode the
592 + frame. The OUTPUT buffer must also contain both fields.
594 +``V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (enum)``
595 + Specifies the HEVC slice start code expected for each slice.
596 + This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
597 + pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
598 + are required to set this control in order to specify the start code
599 + that is expected for the buffer.
600 + Drivers may expose a single or multiple start codes, depending
601 + on what they can support.
605 + This menu control is not yet part of the public kernel API and
606 + it is expected to change.
608 +.. c:type:: v4l2_mpeg_video_hevc_start_code
610 +.. cssclass:: longtable
617 + * - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_NONE``
619 + - Selecting this value specifies that HEVC slices are passed
620 + to the driver without any start code.
621 + * - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_ANNEX_B``
623 + - Selecting this value specifies that HEVC slices are expected
624 + to be prefixed by Annex B start codes. According to :ref:`hevc`
625 + valid start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001.
626 --- a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst
627 +++ b/Documentation/media/uapi/v4l/vidioc-queryctrl.rst
628 @@ -479,6 +479,24 @@ See also the examples in :ref:`control`.
630 - A struct :c:type:`v4l2_ctrl_h264_decode_params`, containing H264
631 decode parameters for stateless video decoders.
632 + * - ``V4L2_CTRL_TYPE_HEVC_SPS``
636 + - A struct :c:type:`v4l2_ctrl_hevc_sps`, containing HEVC Sequence
637 + Parameter Set for stateless video decoders.
638 + * - ``V4L2_CTRL_TYPE_HEVC_PPS``
642 + - A struct :c:type:`v4l2_ctrl_hevc_pps`, containing HEVC Picture
643 + Parameter Set for stateless video decoders.
644 + * - ``V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS``
648 + - A struct :c:type:`v4l2_ctrl_hevc_slice_params`, containing HEVC
649 + slice parameters for stateless video decoders.
651 .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
653 --- a/Documentation/media/videodev2.h.rst.exceptions
654 +++ b/Documentation/media/videodev2.h.rst.exceptions
655 @@ -141,6 +141,9 @@ replace symbol V4L2_CTRL_TYPE_H264_PPS :
656 replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`v4l2_ctrl_type`
657 replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
658 replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`v4l2_ctrl_type`
659 +replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type`
660 +replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type`
661 +replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
662 replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type`
664 # V4L2 capability defines
665 --- a/drivers/media/v4l2-core/v4l2-ctrls.c
666 +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
667 @@ -567,6 +567,16 @@ const char * const *v4l2_ctrl_get_menu(u
668 "Disabled at slice boundary",
671 + static const char * const hevc_decode_mode[] = {
676 + static const char * const hevc_start_code[] = {
678 + "Annex B Start Code",
683 case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
684 @@ -688,7 +698,10 @@ const char * const *v4l2_ctrl_get_menu(u
686 case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE:
687 return hevc_loop_filter_mode;
689 + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE:
690 + return hevc_decode_mode;
691 + case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE:
692 + return hevc_start_code;
696 @@ -958,6 +971,11 @@ const char *v4l2_ctrl_get_name(u32 id)
697 case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
698 case V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES: return "Reference Frames for a P-Frame";
699 case V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR: return "Prepend SPS and PPS to IDR";
700 + case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set";
701 + case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set";
702 + case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters";
703 + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode";
704 + case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code";
706 /* CAMERA controls */
707 /* Keep the order of the 'case's the same as in v4l2-controls.h! */
708 @@ -1267,6 +1285,8 @@ void v4l2_ctrl_fill(u32 id, const char *
709 case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
710 case V4L2_CID_MPEG_VIDEO_HEVC_TIER:
711 case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE:
712 + case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE:
713 + case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE:
714 *type = V4L2_CTRL_TYPE_MENU;
716 case V4L2_CID_LINK_FREQ:
717 @@ -1377,6 +1397,15 @@ void v4l2_ctrl_fill(u32 id, const char *
718 case V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER:
719 *type = V4L2_CTRL_TYPE_VP8_FRAME_HEADER;
721 + case V4L2_CID_MPEG_VIDEO_HEVC_SPS:
722 + *type = V4L2_CTRL_TYPE_HEVC_SPS;
724 + case V4L2_CID_MPEG_VIDEO_HEVC_PPS:
725 + *type = V4L2_CTRL_TYPE_HEVC_PPS;
727 + case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS:
728 + *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS;
730 case V4L2_CID_UNIT_CELL_SIZE:
731 *type = V4L2_CTRL_TYPE_AREA;
732 *flags |= V4L2_CTRL_FLAG_READ_ONLY;
733 @@ -1678,8 +1707,12 @@ static int std_validate_compound(const s
735 struct v4l2_ctrl_mpeg2_slice_params *p_mpeg2_slice_params;
736 struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header;
737 + struct v4l2_ctrl_hevc_sps *p_hevc_sps;
738 + struct v4l2_ctrl_hevc_pps *p_hevc_pps;
739 + struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
740 struct v4l2_area *area;
741 void *p = ptr.p + idx * ctrl->elem_size;
744 switch ((u32)ctrl->type) {
745 case V4L2_CTRL_TYPE_MPEG2_SLICE_PARAMS:
746 @@ -1755,11 +1788,76 @@ static int std_validate_compound(const s
747 zero_padding(p_vp8_frame_header->entropy_header);
748 zero_padding(p_vp8_frame_header->coder_state);
751 + case V4L2_CTRL_TYPE_HEVC_SPS:
754 + if (!(p_hevc_sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED)) {
755 + p_hevc_sps->pcm_sample_bit_depth_luma_minus1 = 0;
756 + p_hevc_sps->pcm_sample_bit_depth_chroma_minus1 = 0;
757 + p_hevc_sps->log2_min_pcm_luma_coding_block_size_minus3 = 0;
758 + p_hevc_sps->log2_diff_max_min_pcm_luma_coding_block_size = 0;
761 + if (!(p_hevc_sps->flags &
762 + V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT))
763 + p_hevc_sps->num_long_term_ref_pics_sps = 0;
766 + case V4L2_CTRL_TYPE_HEVC_PPS:
769 + if (!(p_hevc_pps->flags &
770 + V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED))
771 + p_hevc_pps->diff_cu_qp_delta_depth = 0;
773 + if (!(p_hevc_pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED)) {
774 + p_hevc_pps->num_tile_columns_minus1 = 0;
775 + p_hevc_pps->num_tile_rows_minus1 = 0;
776 + memset(&p_hevc_pps->column_width_minus1, 0,
777 + sizeof(p_hevc_pps->column_width_minus1));
778 + memset(&p_hevc_pps->row_height_minus1, 0,
779 + sizeof(p_hevc_pps->row_height_minus1));
781 + p_hevc_pps->flags &=
782 + ~V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED;
785 + if (p_hevc_pps->flags &
786 + V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER) {
787 + p_hevc_pps->pps_beta_offset_div2 = 0;
788 + p_hevc_pps->pps_tc_offset_div2 = 0;
791 + zero_padding(*p_hevc_pps);
794 + case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
795 + p_hevc_slice_params = p;
797 + if (p_hevc_slice_params->num_active_dpb_entries >
798 + V4L2_HEVC_DPB_ENTRIES_NUM_MAX)
801 + zero_padding(p_hevc_slice_params->pred_weight_table);
803 + for (i = 0; i < p_hevc_slice_params->num_active_dpb_entries;
805 + struct v4l2_hevc_dpb_entry *dpb_entry =
806 + &p_hevc_slice_params->dpb[i];
808 + zero_padding(*dpb_entry);
811 + zero_padding(*p_hevc_slice_params);
814 case V4L2_CTRL_TYPE_AREA:
816 if (!area->width || !area->height)
823 @@ -2433,6 +2531,15 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
824 case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:
825 elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header);
827 + case V4L2_CTRL_TYPE_HEVC_SPS:
828 + elem_size = sizeof(struct v4l2_ctrl_hevc_sps);
830 + case V4L2_CTRL_TYPE_HEVC_PPS:
831 + elem_size = sizeof(struct v4l2_ctrl_hevc_pps);
833 + case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
834 + elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
836 case V4L2_CTRL_TYPE_AREA:
837 elem_size = sizeof(struct v4l2_area);
839 --- a/drivers/media/v4l2-core/v4l2-ioctl.c
840 +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
841 @@ -1356,6 +1356,7 @@ static void v4l_fill_fmtdesc(struct v4l2
842 case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break;
843 case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
844 case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */
845 + case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break;
846 case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */
847 case V4L2_PIX_FMT_FWHT_STATELESS: descr = "FWHT Stateless"; break; /* used in vicodec */
848 case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
850 +++ b/include/media/hevc-ctrls.h
852 +/* SPDX-License-Identifier: GPL-2.0 */
854 + * These are the HEVC state controls for use with stateless HEVC
857 + * It turns out that these structs are not stable yet and will undergo
858 + * more changes. So keep them private until they are stable and ready to
859 + * become part of the official public API.
862 +#ifndef _HEVC_CTRLS_H_
863 +#define _HEVC_CTRLS_H_
865 +#include <linux/videodev2.h>
867 +/* The pixel format isn't stable at the moment and will likely be renamed. */
868 +#define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5') /* HEVC parsed slices */
870 +#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_MPEG_BASE + 1008)
871 +#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_MPEG_BASE + 1009)
872 +#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_MPEG_BASE + 1010)
873 +#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_MPEG_BASE + 1015)
874 +#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_MPEG_BASE + 1016)
876 +/* enum v4l2_ctrl_type type values */
877 +#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120
878 +#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121
879 +#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122
881 +enum v4l2_mpeg_video_hevc_decode_mode {
882 + V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED,
883 + V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_FRAME_BASED,
886 +enum v4l2_mpeg_video_hevc_start_code {
887 + V4L2_MPEG_VIDEO_HEVC_START_CODE_NONE,
888 + V4L2_MPEG_VIDEO_HEVC_START_CODE_ANNEX_B,
891 +#define V4L2_HEVC_SLICE_TYPE_B 0
892 +#define V4L2_HEVC_SLICE_TYPE_P 1
893 +#define V4L2_HEVC_SLICE_TYPE_I 2
895 +#define V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE (1ULL << 0)
896 +#define V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED (1ULL << 1)
897 +#define V4L2_HEVC_SPS_FLAG_AMP_ENABLED (1ULL << 2)
898 +#define V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET (1ULL << 3)
899 +#define V4L2_HEVC_SPS_FLAG_PCM_ENABLED (1ULL << 4)
900 +#define V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED (1ULL << 5)
901 +#define V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT (1ULL << 6)
902 +#define V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED (1ULL << 7)
903 +#define V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED (1ULL << 8)
905 +/* The controls are not stable at the moment and will likely be reworked. */
906 +struct v4l2_ctrl_hevc_sps {
907 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */
908 + __u16 pic_width_in_luma_samples;
909 + __u16 pic_height_in_luma_samples;
910 + __u8 bit_depth_luma_minus8;
911 + __u8 bit_depth_chroma_minus8;
912 + __u8 log2_max_pic_order_cnt_lsb_minus4;
913 + __u8 sps_max_dec_pic_buffering_minus1;
914 + __u8 sps_max_num_reorder_pics;
915 + __u8 sps_max_latency_increase_plus1;
916 + __u8 log2_min_luma_coding_block_size_minus3;
917 + __u8 log2_diff_max_min_luma_coding_block_size;
918 + __u8 log2_min_luma_transform_block_size_minus2;
919 + __u8 log2_diff_max_min_luma_transform_block_size;
920 + __u8 max_transform_hierarchy_depth_inter;
921 + __u8 max_transform_hierarchy_depth_intra;
922 + __u8 pcm_sample_bit_depth_luma_minus1;
923 + __u8 pcm_sample_bit_depth_chroma_minus1;
924 + __u8 log2_min_pcm_luma_coding_block_size_minus3;
925 + __u8 log2_diff_max_min_pcm_luma_coding_block_size;
926 + __u8 num_short_term_ref_pic_sets;
927 + __u8 num_long_term_ref_pics_sps;
928 + __u8 chroma_format_idc;
935 +#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 0)
936 +#define V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT (1ULL << 1)
937 +#define V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED (1ULL << 2)
938 +#define V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT (1ULL << 3)
939 +#define V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED (1ULL << 4)
940 +#define V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED (1ULL << 5)
941 +#define V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED (1ULL << 6)
942 +#define V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT (1ULL << 7)
943 +#define V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED (1ULL << 8)
944 +#define V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED (1ULL << 9)
945 +#define V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED (1ULL << 10)
946 +#define V4L2_HEVC_PPS_FLAG_TILES_ENABLED (1ULL << 11)
947 +#define V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED (1ULL << 12)
948 +#define V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED (1ULL << 13)
949 +#define V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 14)
950 +#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED (1ULL << 15)
951 +#define V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER (1ULL << 16)
952 +#define V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT (1ULL << 17)
953 +#define V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT (1ULL << 18)
955 +struct v4l2_ctrl_hevc_pps {
956 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */
957 + __u8 num_extra_slice_header_bits;
958 + __s8 init_qp_minus26;
959 + __u8 diff_cu_qp_delta_depth;
960 + __s8 pps_cb_qp_offset;
961 + __s8 pps_cr_qp_offset;
962 + __u8 num_tile_columns_minus1;
963 + __u8 num_tile_rows_minus1;
964 + __u8 column_width_minus1[20];
965 + __u8 row_height_minus1[22];
966 + __s8 pps_beta_offset_div2;
967 + __s8 pps_tc_offset_div2;
968 + __u8 log2_parallel_merge_level_minus2;
974 +#define V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_BEFORE 0x01
975 +#define V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_AFTER 0x02
976 +#define V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR 0x03
978 +#define V4L2_HEVC_DPB_ENTRIES_NUM_MAX 16
980 +struct v4l2_hevc_dpb_entry {
984 + __u16 pic_order_cnt[2];
988 +struct v4l2_hevc_pred_weight_table {
989 + __s8 delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
990 + __s8 luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
991 + __s8 delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
992 + __s8 chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
994 + __s8 delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
995 + __s8 luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
996 + __s8 delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
997 + __s8 chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
1001 + __u8 luma_log2_weight_denom;
1002 + __s8 delta_chroma_log2_weight_denom;
1005 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA (1ULL << 0)
1006 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA (1ULL << 1)
1007 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED (1ULL << 2)
1008 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO (1ULL << 3)
1009 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT (1ULL << 4)
1010 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0 (1ULL << 5)
1011 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV (1ULL << 6)
1012 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED (1ULL << 7)
1013 +#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8)
1015 +struct v4l2_ctrl_hevc_slice_params {
1017 + __u32 data_bit_offset;
1019 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
1020 + __u8 nal_unit_type;
1021 + __u8 nuh_temporal_id_plus1;
1023 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1025 + __u8 colour_plane_id;
1026 + __u16 slice_pic_order_cnt;
1027 + __u8 num_ref_idx_l0_active_minus1;
1028 + __u8 num_ref_idx_l1_active_minus1;
1029 + __u8 collocated_ref_idx;
1030 + __u8 five_minus_max_num_merge_cand;
1031 + __s8 slice_qp_delta;
1032 + __s8 slice_cb_qp_offset;
1033 + __s8 slice_cr_qp_offset;
1034 + __s8 slice_act_y_qp_offset;
1035 + __s8 slice_act_cb_qp_offset;
1036 + __s8 slice_act_cr_qp_offset;
1037 + __s8 slice_beta_offset_div2;
1038 + __s8 slice_tc_offset_div2;
1040 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture timing SEI message */
1043 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1044 + __u8 num_active_dpb_entries;
1045 + __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1046 + __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1048 + __u8 num_rps_poc_st_curr_before;
1049 + __u8 num_rps_poc_st_curr_after;
1050 + __u8 num_rps_poc_lt_curr;
1054 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1055 + struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1057 + /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
1058 + struct v4l2_hevc_pred_weight_table pred_weight_table;
1064 --- a/include/media/v4l2-ctrls.h
1065 +++ b/include/media/v4l2-ctrls.h
1067 #include <media/fwht-ctrls.h>
1068 #include <media/h264-ctrls.h>
1069 #include <media/vp8-ctrls.h>
1070 +#include <media/hevc-ctrls.h>
1072 /* forward references */
1074 @@ -50,6 +51,9 @@ struct poll_table_struct;
1075 * @p_h264_slice_params: Pointer to a struct v4l2_ctrl_h264_slice_params.
1076 * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params.
1077 * @p_vp8_frame_header: Pointer to a VP8 frame header structure.
1078 + * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure.
1079 + * @p_hevc_pps: Pointer to an HEVC picture parameter set structure.
1080 + * @p_hevc_slice_params: Pointer to an HEVC slice parameters structure.
1081 * @p_area: Pointer to an area.
1082 * @p: Pointer to a compound value.
1084 @@ -69,6 +73,9 @@ union v4l2_ctrl_ptr {
1085 struct v4l2_ctrl_h264_slice_params *p_h264_slice_params;
1086 struct v4l2_ctrl_h264_decode_params *p_h264_decode_params;
1087 struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header;
1088 + struct v4l2_ctrl_hevc_sps *p_hevc_sps;
1089 + struct v4l2_ctrl_hevc_pps *p_hevc_pps;
1090 + struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
1091 struct v4l2_area *p_area;