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1 From 8531c80800c10e8ef7952022326c2f983e1314bf Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Sat, 23 Jul 2022 16:29:31 +0200
4 Subject: [PATCH 3/5] net: ethernet: stmicro: stmmac: move dma conf to
5 dedicated struct
6
7 Move dma buf conf to dedicated struct. This in preparation for code
8 rework that will permit to allocate separate dma_conf without affecting
9 the priv struct.
10
11 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
12 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
13 ---
14 .../net/ethernet/stmicro/stmmac/chain_mode.c | 6 +-
15 .../net/ethernet/stmicro/stmmac/ring_mode.c | 4 +-
16 drivers/net/ethernet/stmicro/stmmac/stmmac.h | 21 +-
17 .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +-
18 .../net/ethernet/stmicro/stmmac/stmmac_main.c | 286 +++++++++---------
19 .../stmicro/stmmac/stmmac_selftests.c | 8 +-
20 .../net/ethernet/stmicro/stmmac/stmmac_tc.c | 6 +-
21 7 files changed, 172 insertions(+), 163 deletions(-)
22
23 --- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
24 +++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
25 @@ -46,7 +46,7 @@ static int jumbo_frm(void *p, struct sk_
26
27 while (len != 0) {
28 tx_q->tx_skbuff[entry] = NULL;
29 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
30 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
31 desc = tx_q->dma_tx + entry;
32
33 if (len > bmax) {
34 @@ -137,7 +137,7 @@ static void refill_desc3(void *priv_ptr,
35 */
36 p->des3 = cpu_to_le32((unsigned int)(rx_q->dma_rx_phy +
37 (((rx_q->dirty_rx) + 1) %
38 - priv->dma_rx_size) *
39 + priv->dma_conf.dma_rx_size) *
40 sizeof(struct dma_desc)));
41 }
42
43 @@ -155,7 +155,7 @@ static void clean_desc3(void *priv_ptr,
44 */
45 p->des3 = cpu_to_le32((unsigned int)((tx_q->dma_tx_phy +
46 ((tx_q->dirty_tx + 1) %
47 - priv->dma_tx_size))
48 + priv->dma_conf.dma_tx_size))
49 * sizeof(struct dma_desc)));
50 }
51
52 --- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
53 +++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
54 @@ -51,7 +51,7 @@ static int jumbo_frm(void *p, struct sk_
55 stmmac_prepare_tx_desc(priv, desc, 1, bmax, csum,
56 STMMAC_RING_MODE, 0, false, skb->len);
57 tx_q->tx_skbuff[entry] = NULL;
58 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
59 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
60
61 if (priv->extend_desc)
62 desc = (struct dma_desc *)(tx_q->dma_etx + entry);
63 @@ -107,7 +107,7 @@ static void refill_desc3(void *priv_ptr,
64 struct stmmac_priv *priv = rx_q->priv_data;
65
66 /* Fill DES3 in case of RING mode */
67 - if (priv->dma_buf_sz == BUF_SIZE_16KiB)
68 + if (priv->dma_conf.dma_buf_sz == BUF_SIZE_16KiB)
69 p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
70 }
71
72 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
73 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
74 @@ -185,6 +185,18 @@ struct stmmac_rfs_entry {
75 int tc;
76 };
77
78 +struct stmmac_dma_conf {
79 + unsigned int dma_buf_sz;
80 +
81 + /* RX Queue */
82 + struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
83 + unsigned int dma_rx_size;
84 +
85 + /* TX Queue */
86 + struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
87 + unsigned int dma_tx_size;
88 +};
89 +
90 struct stmmac_priv {
91 /* Frequently used values are kept adjacent for cache effect */
92 u32 tx_coal_frames[MTL_MAX_TX_QUEUES];
93 @@ -199,7 +211,6 @@ struct stmmac_priv {
94 int sph_cap;
95 u32 sarc_type;
96
97 - unsigned int dma_buf_sz;
98 unsigned int rx_copybreak;
99 u32 rx_riwt[MTL_MAX_TX_QUEUES];
100 int hwts_rx_en;
101 @@ -211,13 +222,7 @@ struct stmmac_priv {
102 int (*hwif_quirks)(struct stmmac_priv *priv);
103 struct mutex lock;
104
105 - /* RX Queue */
106 - struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
107 - unsigned int dma_rx_size;
108 -
109 - /* TX Queue */
110 - struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
111 - unsigned int dma_tx_size;
112 + struct stmmac_dma_conf dma_conf;
113
114 /* Generic channel for NAPI */
115 struct stmmac_channel channel[STMMAC_CH_MAX];
116 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
117 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
118 @@ -484,8 +484,8 @@ static void stmmac_get_ringparam(struct
119
120 ring->rx_max_pending = DMA_MAX_RX_SIZE;
121 ring->tx_max_pending = DMA_MAX_TX_SIZE;
122 - ring->rx_pending = priv->dma_rx_size;
123 - ring->tx_pending = priv->dma_tx_size;
124 + ring->rx_pending = priv->dma_conf.dma_rx_size;
125 + ring->tx_pending = priv->dma_conf.dma_tx_size;
126 }
127
128 static int stmmac_set_ringparam(struct net_device *netdev,
129 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
130 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
131 @@ -74,8 +74,8 @@ static int phyaddr = -1;
132 module_param(phyaddr, int, 0444);
133 MODULE_PARM_DESC(phyaddr, "Physical device address");
134
135 -#define STMMAC_TX_THRESH(x) ((x)->dma_tx_size / 4)
136 -#define STMMAC_RX_THRESH(x) ((x)->dma_rx_size / 4)
137 +#define STMMAC_TX_THRESH(x) ((x)->dma_conf.dma_tx_size / 4)
138 +#define STMMAC_RX_THRESH(x) ((x)->dma_conf.dma_rx_size / 4)
139
140 /* Limit to make sure XDP TX and slow path can coexist */
141 #define STMMAC_XSK_TX_BUDGET_MAX 256
142 @@ -232,7 +232,7 @@ static void stmmac_disable_all_queues(st
143
144 /* synchronize_rcu() needed for pending XDP buffers to drain */
145 for (queue = 0; queue < rx_queues_cnt; queue++) {
146 - rx_q = &priv->rx_queue[queue];
147 + rx_q = &priv->dma_conf.rx_queue[queue];
148 if (rx_q->xsk_pool) {
149 synchronize_rcu();
150 break;
151 @@ -358,13 +358,13 @@ static void print_pkt(unsigned char *buf
152
153 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv, u32 queue)
154 {
155 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
156 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
157 u32 avail;
158
159 if (tx_q->dirty_tx > tx_q->cur_tx)
160 avail = tx_q->dirty_tx - tx_q->cur_tx - 1;
161 else
162 - avail = priv->dma_tx_size - tx_q->cur_tx + tx_q->dirty_tx - 1;
163 + avail = priv->dma_conf.dma_tx_size - tx_q->cur_tx + tx_q->dirty_tx - 1;
164
165 return avail;
166 }
167 @@ -376,13 +376,13 @@ static inline u32 stmmac_tx_avail(struct
168 */
169 static inline u32 stmmac_rx_dirty(struct stmmac_priv *priv, u32 queue)
170 {
171 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
172 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
173 u32 dirty;
174
175 if (rx_q->dirty_rx <= rx_q->cur_rx)
176 dirty = rx_q->cur_rx - rx_q->dirty_rx;
177 else
178 - dirty = priv->dma_rx_size - rx_q->dirty_rx + rx_q->cur_rx;
179 + dirty = priv->dma_conf.dma_rx_size - rx_q->dirty_rx + rx_q->cur_rx;
180
181 return dirty;
182 }
183 @@ -410,7 +410,7 @@ static int stmmac_enable_eee_mode(struct
184
185 /* check if all TX queues have the work finished */
186 for (queue = 0; queue < tx_cnt; queue++) {
187 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
188 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
189
190 if (tx_q->dirty_tx != tx_q->cur_tx)
191 return -EBUSY; /* still unfinished work */
192 @@ -1310,7 +1310,7 @@ static void stmmac_display_rx_rings(stru
193
194 /* Display RX rings */
195 for (queue = 0; queue < rx_cnt; queue++) {
196 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
197 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
198
199 pr_info("\tRX Queue %u rings\n", queue);
200
201 @@ -1323,7 +1323,7 @@ static void stmmac_display_rx_rings(stru
202 }
203
204 /* Display RX ring */
205 - stmmac_display_ring(priv, head_rx, priv->dma_rx_size, true,
206 + stmmac_display_ring(priv, head_rx, priv->dma_conf.dma_rx_size, true,
207 rx_q->dma_rx_phy, desc_size);
208 }
209 }
210 @@ -1337,7 +1337,7 @@ static void stmmac_display_tx_rings(stru
211
212 /* Display TX rings */
213 for (queue = 0; queue < tx_cnt; queue++) {
214 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
215 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
216
217 pr_info("\tTX Queue %d rings\n", queue);
218
219 @@ -1352,7 +1352,7 @@ static void stmmac_display_tx_rings(stru
220 desc_size = sizeof(struct dma_desc);
221 }
222
223 - stmmac_display_ring(priv, head_tx, priv->dma_tx_size, false,
224 + stmmac_display_ring(priv, head_tx, priv->dma_conf.dma_tx_size, false,
225 tx_q->dma_tx_phy, desc_size);
226 }
227 }
228 @@ -1393,21 +1393,21 @@ static int stmmac_set_bfsize(int mtu, in
229 */
230 static void stmmac_clear_rx_descriptors(struct stmmac_priv *priv, u32 queue)
231 {
232 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
233 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
234 int i;
235
236 /* Clear the RX descriptors */
237 - for (i = 0; i < priv->dma_rx_size; i++)
238 + for (i = 0; i < priv->dma_conf.dma_rx_size; i++)
239 if (priv->extend_desc)
240 stmmac_init_rx_desc(priv, &rx_q->dma_erx[i].basic,
241 priv->use_riwt, priv->mode,
242 - (i == priv->dma_rx_size - 1),
243 - priv->dma_buf_sz);
244 + (i == priv->dma_conf.dma_rx_size - 1),
245 + priv->dma_conf.dma_buf_sz);
246 else
247 stmmac_init_rx_desc(priv, &rx_q->dma_rx[i],
248 priv->use_riwt, priv->mode,
249 - (i == priv->dma_rx_size - 1),
250 - priv->dma_buf_sz);
251 + (i == priv->dma_conf.dma_rx_size - 1),
252 + priv->dma_conf.dma_buf_sz);
253 }
254
255 /**
256 @@ -1419,12 +1419,12 @@ static void stmmac_clear_rx_descriptors(
257 */
258 static void stmmac_clear_tx_descriptors(struct stmmac_priv *priv, u32 queue)
259 {
260 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
261 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
262 int i;
263
264 /* Clear the TX descriptors */
265 - for (i = 0; i < priv->dma_tx_size; i++) {
266 - int last = (i == (priv->dma_tx_size - 1));
267 + for (i = 0; i < priv->dma_conf.dma_tx_size; i++) {
268 + int last = (i == (priv->dma_conf.dma_tx_size - 1));
269 struct dma_desc *p;
270
271 if (priv->extend_desc)
272 @@ -1472,7 +1472,7 @@ static void stmmac_clear_descriptors(str
273 static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
274 int i, gfp_t flags, u32 queue)
275 {
276 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
277 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
278 struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
279
280 if (!buf->page) {
281 @@ -1497,7 +1497,7 @@ static int stmmac_init_rx_buffers(struct
282 buf->addr = page_pool_get_dma_addr(buf->page) + buf->page_offset;
283
284 stmmac_set_desc_addr(priv, p, buf->addr);
285 - if (priv->dma_buf_sz == BUF_SIZE_16KiB)
286 + if (priv->dma_conf.dma_buf_sz == BUF_SIZE_16KiB)
287 stmmac_init_desc3(priv, p);
288
289 return 0;
290 @@ -1511,7 +1511,7 @@ static int stmmac_init_rx_buffers(struct
291 */
292 static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
293 {
294 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
295 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
296 struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
297
298 if (buf->page)
299 @@ -1531,7 +1531,7 @@ static void stmmac_free_rx_buffer(struct
300 */
301 static void stmmac_free_tx_buffer(struct stmmac_priv *priv, u32 queue, int i)
302 {
303 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
304 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
305
306 if (tx_q->tx_skbuff_dma[i].buf &&
307 tx_q->tx_skbuff_dma[i].buf_type != STMMAC_TXBUF_T_XDP_TX) {
308 @@ -1576,17 +1576,17 @@ static void dma_free_rx_skbufs(struct st
309 {
310 int i;
311
312 - for (i = 0; i < priv->dma_rx_size; i++)
313 + for (i = 0; i < priv->dma_conf.dma_rx_size; i++)
314 stmmac_free_rx_buffer(priv, queue, i);
315 }
316
317 static int stmmac_alloc_rx_buffers(struct stmmac_priv *priv, u32 queue,
318 gfp_t flags)
319 {
320 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
321 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
322 int i;
323
324 - for (i = 0; i < priv->dma_rx_size; i++) {
325 + for (i = 0; i < priv->dma_conf.dma_rx_size; i++) {
326 struct dma_desc *p;
327 int ret;
328
329 @@ -1613,10 +1613,10 @@ static int stmmac_alloc_rx_buffers(struc
330 */
331 static void dma_free_rx_xskbufs(struct stmmac_priv *priv, u32 queue)
332 {
333 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
334 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
335 int i;
336
337 - for (i = 0; i < priv->dma_rx_size; i++) {
338 + for (i = 0; i < priv->dma_conf.dma_rx_size; i++) {
339 struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
340
341 if (!buf->xdp)
342 @@ -1629,10 +1629,10 @@ static void dma_free_rx_xskbufs(struct s
343
344 static int stmmac_alloc_rx_buffers_zc(struct stmmac_priv *priv, u32 queue)
345 {
346 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
347 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
348 int i;
349
350 - for (i = 0; i < priv->dma_rx_size; i++) {
351 + for (i = 0; i < priv->dma_conf.dma_rx_size; i++) {
352 struct stmmac_rx_buffer *buf;
353 dma_addr_t dma_addr;
354 struct dma_desc *p;
355 @@ -1675,7 +1675,7 @@ static struct xsk_buff_pool *stmmac_get_
356 */
357 static int __init_dma_rx_desc_rings(struct stmmac_priv *priv, u32 queue, gfp_t flags)
358 {
359 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
360 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
361 int ret;
362
363 netif_dbg(priv, probe, priv->dev,
364 @@ -1721,11 +1721,11 @@ static int __init_dma_rx_desc_rings(stru
365 if (priv->extend_desc)
366 stmmac_mode_init(priv, rx_q->dma_erx,
367 rx_q->dma_rx_phy,
368 - priv->dma_rx_size, 1);
369 + priv->dma_conf.dma_rx_size, 1);
370 else
371 stmmac_mode_init(priv, rx_q->dma_rx,
372 rx_q->dma_rx_phy,
373 - priv->dma_rx_size, 0);
374 + priv->dma_conf.dma_rx_size, 0);
375 }
376
377 return 0;
378 @@ -1752,7 +1752,7 @@ static int init_dma_rx_desc_rings(struct
379
380 err_init_rx_buffers:
381 while (queue >= 0) {
382 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
383 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
384
385 if (rx_q->xsk_pool)
386 dma_free_rx_xskbufs(priv, queue);
387 @@ -1781,7 +1781,7 @@ err_init_rx_buffers:
388 */
389 static int __init_dma_tx_desc_rings(struct stmmac_priv *priv, u32 queue)
390 {
391 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
392 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
393 int i;
394
395 netif_dbg(priv, probe, priv->dev,
396 @@ -1793,16 +1793,16 @@ static int __init_dma_tx_desc_rings(stru
397 if (priv->extend_desc)
398 stmmac_mode_init(priv, tx_q->dma_etx,
399 tx_q->dma_tx_phy,
400 - priv->dma_tx_size, 1);
401 + priv->dma_conf.dma_tx_size, 1);
402 else if (!(tx_q->tbs & STMMAC_TBS_AVAIL))
403 stmmac_mode_init(priv, tx_q->dma_tx,
404 tx_q->dma_tx_phy,
405 - priv->dma_tx_size, 0);
406 + priv->dma_conf.dma_tx_size, 0);
407 }
408
409 tx_q->xsk_pool = stmmac_get_xsk_pool(priv, queue);
410
411 - for (i = 0; i < priv->dma_tx_size; i++) {
412 + for (i = 0; i < priv->dma_conf.dma_tx_size; i++) {
413 struct dma_desc *p;
414
415 if (priv->extend_desc)
416 @@ -1872,12 +1872,12 @@ static int init_dma_desc_rings(struct ne
417 */
418 static void dma_free_tx_skbufs(struct stmmac_priv *priv, u32 queue)
419 {
420 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
421 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
422 int i;
423
424 tx_q->xsk_frames_done = 0;
425
426 - for (i = 0; i < priv->dma_tx_size; i++)
427 + for (i = 0; i < priv->dma_conf.dma_tx_size; i++)
428 stmmac_free_tx_buffer(priv, queue, i);
429
430 if (tx_q->xsk_pool && tx_q->xsk_frames_done) {
431 @@ -1907,7 +1907,7 @@ static void stmmac_free_tx_skbufs(struct
432 */
433 static void __free_dma_rx_desc_resources(struct stmmac_priv *priv, u32 queue)
434 {
435 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
436 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
437
438 /* Release the DMA RX socket buffers */
439 if (rx_q->xsk_pool)
440 @@ -1920,11 +1920,11 @@ static void __free_dma_rx_desc_resources
441
442 /* Free DMA regions of consistent memory previously allocated */
443 if (!priv->extend_desc)
444 - dma_free_coherent(priv->device, priv->dma_rx_size *
445 + dma_free_coherent(priv->device, priv->dma_conf.dma_rx_size *
446 sizeof(struct dma_desc),
447 rx_q->dma_rx, rx_q->dma_rx_phy);
448 else
449 - dma_free_coherent(priv->device, priv->dma_rx_size *
450 + dma_free_coherent(priv->device, priv->dma_conf.dma_rx_size *
451 sizeof(struct dma_extended_desc),
452 rx_q->dma_erx, rx_q->dma_rx_phy);
453
454 @@ -1953,7 +1953,7 @@ static void free_dma_rx_desc_resources(s
455 */
456 static void __free_dma_tx_desc_resources(struct stmmac_priv *priv, u32 queue)
457 {
458 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
459 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
460 size_t size;
461 void *addr;
462
463 @@ -1971,7 +1971,7 @@ static void __free_dma_tx_desc_resources
464 addr = tx_q->dma_tx;
465 }
466
467 - size *= priv->dma_tx_size;
468 + size *= priv->dma_conf.dma_tx_size;
469
470 dma_free_coherent(priv->device, size, addr, tx_q->dma_tx_phy);
471
472 @@ -2000,7 +2000,7 @@ static void free_dma_tx_desc_resources(s
473 */
474 static int __alloc_dma_rx_desc_resources(struct stmmac_priv *priv, u32 queue)
475 {
476 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
477 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
478 struct stmmac_channel *ch = &priv->channel[queue];
479 bool xdp_prog = stmmac_xdp_is_enabled(priv);
480 struct page_pool_params pp_params = { 0 };
481 @@ -2012,8 +2012,8 @@ static int __alloc_dma_rx_desc_resources
482 rx_q->priv_data = priv;
483
484 pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;
485 - pp_params.pool_size = priv->dma_rx_size;
486 - num_pages = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE);
487 + pp_params.pool_size = priv->dma_conf.dma_rx_size;
488 + num_pages = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE);
489 pp_params.order = ilog2(num_pages);
490 pp_params.nid = dev_to_node(priv->device);
491 pp_params.dev = priv->device;
492 @@ -2028,7 +2028,7 @@ static int __alloc_dma_rx_desc_resources
493 return ret;
494 }
495
496 - rx_q->buf_pool = kcalloc(priv->dma_rx_size,
497 + rx_q->buf_pool = kcalloc(priv->dma_conf.dma_rx_size,
498 sizeof(*rx_q->buf_pool),
499 GFP_KERNEL);
500 if (!rx_q->buf_pool)
501 @@ -2036,7 +2036,7 @@ static int __alloc_dma_rx_desc_resources
502
503 if (priv->extend_desc) {
504 rx_q->dma_erx = dma_alloc_coherent(priv->device,
505 - priv->dma_rx_size *
506 + priv->dma_conf.dma_rx_size *
507 sizeof(struct dma_extended_desc),
508 &rx_q->dma_rx_phy,
509 GFP_KERNEL);
510 @@ -2045,7 +2045,7 @@ static int __alloc_dma_rx_desc_resources
511
512 } else {
513 rx_q->dma_rx = dma_alloc_coherent(priv->device,
514 - priv->dma_rx_size *
515 + priv->dma_conf.dma_rx_size *
516 sizeof(struct dma_desc),
517 &rx_q->dma_rx_phy,
518 GFP_KERNEL);
519 @@ -2102,20 +2102,20 @@ err_dma:
520 */
521 static int __alloc_dma_tx_desc_resources(struct stmmac_priv *priv, u32 queue)
522 {
523 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
524 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
525 size_t size;
526 void *addr;
527
528 tx_q->queue_index = queue;
529 tx_q->priv_data = priv;
530
531 - tx_q->tx_skbuff_dma = kcalloc(priv->dma_tx_size,
532 + tx_q->tx_skbuff_dma = kcalloc(priv->dma_conf.dma_tx_size,
533 sizeof(*tx_q->tx_skbuff_dma),
534 GFP_KERNEL);
535 if (!tx_q->tx_skbuff_dma)
536 return -ENOMEM;
537
538 - tx_q->tx_skbuff = kcalloc(priv->dma_tx_size,
539 + tx_q->tx_skbuff = kcalloc(priv->dma_conf.dma_tx_size,
540 sizeof(struct sk_buff *),
541 GFP_KERNEL);
542 if (!tx_q->tx_skbuff)
543 @@ -2128,7 +2128,7 @@ static int __alloc_dma_tx_desc_resources
544 else
545 size = sizeof(struct dma_desc);
546
547 - size *= priv->dma_tx_size;
548 + size *= priv->dma_conf.dma_tx_size;
549
550 addr = dma_alloc_coherent(priv->device, size,
551 &tx_q->dma_tx_phy, GFP_KERNEL);
552 @@ -2372,7 +2372,7 @@ static void stmmac_dma_operation_mode(st
553
554 /* configure all channels */
555 for (chan = 0; chan < rx_channels_count; chan++) {
556 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan];
557 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];
558 u32 buf_size;
559
560 qmode = priv->plat->rx_queues_cfg[chan].mode_to_use;
561 @@ -2387,7 +2387,7 @@ static void stmmac_dma_operation_mode(st
562 chan);
563 } else {
564 stmmac_set_dma_bfsize(priv, priv->ioaddr,
565 - priv->dma_buf_sz,
566 + priv->dma_conf.dma_buf_sz,
567 chan);
568 }
569 }
570 @@ -2403,7 +2403,7 @@ static void stmmac_dma_operation_mode(st
571 static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
572 {
573 struct netdev_queue *nq = netdev_get_tx_queue(priv->dev, queue);
574 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
575 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
576 struct xsk_buff_pool *pool = tx_q->xsk_pool;
577 unsigned int entry = tx_q->cur_tx;
578 struct dma_desc *tx_desc = NULL;
579 @@ -2478,7 +2478,7 @@ static bool stmmac_xdp_xmit_zc(struct st
580
581 stmmac_enable_dma_transmission(priv, priv->ioaddr);
582
583 - tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size);
584 + tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
585 entry = tx_q->cur_tx;
586 }
587
588 @@ -2504,7 +2504,7 @@ static bool stmmac_xdp_xmit_zc(struct st
589 */
590 static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue)
591 {
592 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
593 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
594 unsigned int bytes_compl = 0, pkts_compl = 0;
595 unsigned int entry, xmits = 0, count = 0;
596
597 @@ -2517,7 +2517,7 @@ static int stmmac_tx_clean(struct stmmac
598 entry = tx_q->dirty_tx;
599
600 /* Try to clean all TX complete frame in 1 shot */
601 - while ((entry != tx_q->cur_tx) && count < priv->dma_tx_size) {
602 + while ((entry != tx_q->cur_tx) && count < priv->dma_conf.dma_tx_size) {
603 struct xdp_frame *xdpf;
604 struct sk_buff *skb;
605 struct dma_desc *p;
606 @@ -2617,7 +2617,7 @@ static int stmmac_tx_clean(struct stmmac
607
608 stmmac_release_tx_desc(priv, p, priv->mode);
609
610 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
611 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
612 }
613 tx_q->dirty_tx = entry;
614
615 @@ -2682,7 +2682,7 @@ static int stmmac_tx_clean(struct stmmac
616 */
617 static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan)
618 {
619 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
620 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
621
622 netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, chan));
623
624 @@ -2749,8 +2749,8 @@ static int stmmac_napi_check(struct stmm
625 {
626 int status = stmmac_dma_interrupt_status(priv, priv->ioaddr,
627 &priv->xstats, chan, dir);
628 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan];
629 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
630 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];
631 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
632 struct stmmac_channel *ch = &priv->channel[chan];
633 struct napi_struct *rx_napi;
634 struct napi_struct *tx_napi;
635 @@ -2926,7 +2926,7 @@ static int stmmac_init_dma_engine(struct
636
637 /* DMA RX Channel Configuration */
638 for (chan = 0; chan < rx_channels_count; chan++) {
639 - rx_q = &priv->rx_queue[chan];
640 + rx_q = &priv->dma_conf.rx_queue[chan];
641
642 stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
643 rx_q->dma_rx_phy, chan);
644 @@ -2940,7 +2940,7 @@ static int stmmac_init_dma_engine(struct
645
646 /* DMA TX Channel Configuration */
647 for (chan = 0; chan < tx_channels_count; chan++) {
648 - tx_q = &priv->tx_queue[chan];
649 + tx_q = &priv->dma_conf.tx_queue[chan];
650
651 stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
652 tx_q->dma_tx_phy, chan);
653 @@ -2955,7 +2955,7 @@ static int stmmac_init_dma_engine(struct
654
655 static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue)
656 {
657 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
658 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
659
660 hrtimer_start(&tx_q->txtimer,
661 STMMAC_COAL_TIMER(priv->tx_coal_timer[queue]),
662 @@ -3005,7 +3005,7 @@ static void stmmac_init_coalesce(struct
663 u32 chan;
664
665 for (chan = 0; chan < tx_channel_count; chan++) {
666 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
667 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
668
669 priv->tx_coal_frames[chan] = STMMAC_TX_FRAMES;
670 priv->tx_coal_timer[chan] = STMMAC_COAL_TX_TIMER;
671 @@ -3027,12 +3027,12 @@ static void stmmac_set_rings_length(stru
672 /* set TX ring length */
673 for (chan = 0; chan < tx_channels_count; chan++)
674 stmmac_set_tx_ring_len(priv, priv->ioaddr,
675 - (priv->dma_tx_size - 1), chan);
676 + (priv->dma_conf.dma_tx_size - 1), chan);
677
678 /* set RX ring length */
679 for (chan = 0; chan < rx_channels_count; chan++)
680 stmmac_set_rx_ring_len(priv, priv->ioaddr,
681 - (priv->dma_rx_size - 1), chan);
682 + (priv->dma_conf.dma_rx_size - 1), chan);
683 }
684
685 /**
686 @@ -3367,7 +3367,7 @@ static int stmmac_hw_setup(struct net_de
687 /* Enable TSO */
688 if (priv->tso) {
689 for (chan = 0; chan < tx_cnt; chan++) {
690 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
691 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
692
693 /* TSO and TBS cannot co-exist */
694 if (tx_q->tbs & STMMAC_TBS_AVAIL)
695 @@ -3389,7 +3389,7 @@ static int stmmac_hw_setup(struct net_de
696
697 /* TBS */
698 for (chan = 0; chan < tx_cnt; chan++) {
699 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
700 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
701 int enable = tx_q->tbs & STMMAC_TBS_AVAIL;
702
703 stmmac_enable_tbs(priv, priv->ioaddr, enable, chan);
704 @@ -3433,7 +3433,7 @@ static void stmmac_free_irq(struct net_d
705 for (j = irq_idx - 1; j >= 0; j--) {
706 if (priv->tx_irq[j] > 0) {
707 irq_set_affinity_hint(priv->tx_irq[j], NULL);
708 - free_irq(priv->tx_irq[j], &priv->tx_queue[j]);
709 + free_irq(priv->tx_irq[j], &priv->dma_conf.tx_queue[j]);
710 }
711 }
712 irq_idx = priv->plat->rx_queues_to_use;
713 @@ -3442,7 +3442,7 @@ static void stmmac_free_irq(struct net_d
714 for (j = irq_idx - 1; j >= 0; j--) {
715 if (priv->rx_irq[j] > 0) {
716 irq_set_affinity_hint(priv->rx_irq[j], NULL);
717 - free_irq(priv->rx_irq[j], &priv->rx_queue[j]);
718 + free_irq(priv->rx_irq[j], &priv->dma_conf.rx_queue[j]);
719 }
720 }
721
722 @@ -3576,7 +3576,7 @@ static int stmmac_request_irq_multi_msi(
723 sprintf(int_name, "%s:%s-%d", dev->name, "rx", i);
724 ret = request_irq(priv->rx_irq[i],
725 stmmac_msi_intr_rx,
726 - 0, int_name, &priv->rx_queue[i]);
727 + 0, int_name, &priv->dma_conf.rx_queue[i]);
728 if (unlikely(ret < 0)) {
729 netdev_err(priv->dev,
730 "%s: alloc rx-%d MSI %d (error: %d)\n",
731 @@ -3599,7 +3599,7 @@ static int stmmac_request_irq_multi_msi(
732 sprintf(int_name, "%s:%s-%d", dev->name, "tx", i);
733 ret = request_irq(priv->tx_irq[i],
734 stmmac_msi_intr_tx,
735 - 0, int_name, &priv->tx_queue[i]);
736 + 0, int_name, &priv->dma_conf.tx_queue[i]);
737 if (unlikely(ret < 0)) {
738 netdev_err(priv->dev,
739 "%s: alloc tx-%d MSI %d (error: %d)\n",
740 @@ -3730,21 +3730,21 @@ static int stmmac_open(struct net_device
741 bfsize = 0;
742
743 if (bfsize < BUF_SIZE_16KiB)
744 - bfsize = stmmac_set_bfsize(dev->mtu, priv->dma_buf_sz);
745 + bfsize = stmmac_set_bfsize(dev->mtu, priv->dma_conf.dma_buf_sz);
746
747 - priv->dma_buf_sz = bfsize;
748 + priv->dma_conf.dma_buf_sz = bfsize;
749 buf_sz = bfsize;
750
751 priv->rx_copybreak = STMMAC_RX_COPYBREAK;
752
753 - if (!priv->dma_tx_size)
754 - priv->dma_tx_size = DMA_DEFAULT_TX_SIZE;
755 - if (!priv->dma_rx_size)
756 - priv->dma_rx_size = DMA_DEFAULT_RX_SIZE;
757 + if (!priv->dma_conf.dma_tx_size)
758 + priv->dma_conf.dma_tx_size = DMA_DEFAULT_TX_SIZE;
759 + if (!priv->dma_conf.dma_rx_size)
760 + priv->dma_conf.dma_rx_size = DMA_DEFAULT_RX_SIZE;
761
762 /* Earlier check for TBS */
763 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) {
764 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
765 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
766 int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en;
767
768 /* Setup per-TXQ tbs flag before TX descriptor alloc */
769 @@ -3802,7 +3802,7 @@ irq_error:
770 phylink_stop(priv->phylink);
771
772 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
773 - hrtimer_cancel(&priv->tx_queue[chan].txtimer);
774 + hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer);
775
776 stmmac_hw_teardown(dev);
777 init_error:
778 @@ -3844,7 +3844,7 @@ static int stmmac_release(struct net_dev
779 stmmac_disable_all_queues(priv);
780
781 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
782 - hrtimer_cancel(&priv->tx_queue[chan].txtimer);
783 + hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer);
784
785 netif_tx_disable(dev);
786
787 @@ -3908,7 +3908,7 @@ static bool stmmac_vlan_insert(struct st
788 return false;
789
790 stmmac_set_tx_owner(priv, p);
791 - tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size);
792 + tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
793 return true;
794 }
795
796 @@ -3926,7 +3926,7 @@ static bool stmmac_vlan_insert(struct st
797 static void stmmac_tso_allocator(struct stmmac_priv *priv, dma_addr_t des,
798 int total_len, bool last_segment, u32 queue)
799 {
800 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
801 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
802 struct dma_desc *desc;
803 u32 buff_size;
804 int tmp_len;
805 @@ -3937,7 +3937,7 @@ static void stmmac_tso_allocator(struct
806 dma_addr_t curr_addr;
807
808 tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx,
809 - priv->dma_tx_size);
810 + priv->dma_conf.dma_tx_size);
811 WARN_ON(tx_q->tx_skbuff[tx_q->cur_tx]);
812
813 if (tx_q->tbs & STMMAC_TBS_AVAIL)
814 @@ -3965,7 +3965,7 @@ static void stmmac_tso_allocator(struct
815
816 static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue)
817 {
818 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
819 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
820 int desc_size;
821
822 if (likely(priv->extend_desc))
823 @@ -4027,7 +4027,7 @@ static netdev_tx_t stmmac_tso_xmit(struc
824 dma_addr_t des;
825 int i;
826
827 - tx_q = &priv->tx_queue[queue];
828 + tx_q = &priv->dma_conf.tx_queue[queue];
829 first_tx = tx_q->cur_tx;
830
831 /* Compute header lengths */
832 @@ -4067,7 +4067,7 @@ static netdev_tx_t stmmac_tso_xmit(struc
833 stmmac_set_mss(priv, mss_desc, mss);
834 tx_q->mss = mss;
835 tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx,
836 - priv->dma_tx_size);
837 + priv->dma_conf.dma_tx_size);
838 WARN_ON(tx_q->tx_skbuff[tx_q->cur_tx]);
839 }
840
841 @@ -4179,7 +4179,7 @@ static netdev_tx_t stmmac_tso_xmit(struc
842 * ndo_start_xmit will fill this descriptor the next time it's
843 * called and stmmac_tx_clean may clean up to this descriptor.
844 */
845 - tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_tx_size);
846 + tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
847
848 if (unlikely(stmmac_tx_avail(priv, queue) <= (MAX_SKB_FRAGS + 1))) {
849 netif_dbg(priv, hw, priv->dev, "%s: stop transmitted packets\n",
850 @@ -4267,7 +4267,7 @@ static netdev_tx_t stmmac_xmit(struct sk
851 int entry, first_tx;
852 dma_addr_t des;
853
854 - tx_q = &priv->tx_queue[queue];
855 + tx_q = &priv->dma_conf.tx_queue[queue];
856 first_tx = tx_q->cur_tx;
857
858 if (priv->tx_path_in_lpi_mode && priv->eee_sw_timer_en)
859 @@ -4330,7 +4330,7 @@ static netdev_tx_t stmmac_xmit(struct sk
860 int len = skb_frag_size(frag);
861 bool last_segment = (i == (nfrags - 1));
862
863 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
864 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
865 WARN_ON(tx_q->tx_skbuff[entry]);
866
867 if (likely(priv->extend_desc))
868 @@ -4401,7 +4401,7 @@ static netdev_tx_t stmmac_xmit(struct sk
869 * ndo_start_xmit will fill this descriptor the next time it's
870 * called and stmmac_tx_clean may clean up to this descriptor.
871 */
872 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
873 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
874 tx_q->cur_tx = entry;
875
876 if (netif_msg_pktdata(priv)) {
877 @@ -4513,7 +4513,7 @@ static void stmmac_rx_vlan(struct net_de
878 */
879 static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
880 {
881 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
882 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
883 int dirty = stmmac_rx_dirty(priv, queue);
884 unsigned int entry = rx_q->dirty_rx;
885
886 @@ -4563,7 +4563,7 @@ static inline void stmmac_rx_refill(stru
887 dma_wmb();
888 stmmac_set_rx_owner(priv, p, use_rx_wd);
889
890 - entry = STMMAC_GET_ENTRY(entry, priv->dma_rx_size);
891 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_rx_size);
892 }
893 rx_q->dirty_rx = entry;
894 rx_q->rx_tail_addr = rx_q->dma_rx_phy +
895 @@ -4591,12 +4591,12 @@ static unsigned int stmmac_rx_buf1_len(s
896
897 /* First descriptor, not last descriptor and not split header */
898 if (status & rx_not_ls)
899 - return priv->dma_buf_sz;
900 + return priv->dma_conf.dma_buf_sz;
901
902 plen = stmmac_get_rx_frame_len(priv, p, coe);
903
904 /* First descriptor and last descriptor and not split header */
905 - return min_t(unsigned int, priv->dma_buf_sz, plen);
906 + return min_t(unsigned int, priv->dma_conf.dma_buf_sz, plen);
907 }
908
909 static unsigned int stmmac_rx_buf2_len(struct stmmac_priv *priv,
910 @@ -4612,7 +4612,7 @@ static unsigned int stmmac_rx_buf2_len(s
911
912 /* Not last descriptor */
913 if (status & rx_not_ls)
914 - return priv->dma_buf_sz;
915 + return priv->dma_conf.dma_buf_sz;
916
917 plen = stmmac_get_rx_frame_len(priv, p, coe);
918
919 @@ -4623,7 +4623,7 @@ static unsigned int stmmac_rx_buf2_len(s
920 static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,
921 struct xdp_frame *xdpf, bool dma_map)
922 {
923 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
924 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
925 unsigned int entry = tx_q->cur_tx;
926 struct dma_desc *tx_desc;
927 dma_addr_t dma_addr;
928 @@ -4686,7 +4686,7 @@ static int stmmac_xdp_xmit_xdpf(struct s
929
930 stmmac_enable_dma_transmission(priv, priv->ioaddr);
931
932 - entry = STMMAC_GET_ENTRY(entry, priv->dma_tx_size);
933 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_tx_size);
934 tx_q->cur_tx = entry;
935
936 return STMMAC_XDP_TX;
937 @@ -4860,7 +4860,7 @@ static void stmmac_dispatch_skb_zc(struc
938
939 static bool stmmac_rx_refill_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
940 {
941 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
942 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
943 unsigned int entry = rx_q->dirty_rx;
944 struct dma_desc *rx_desc = NULL;
945 bool ret = true;
946 @@ -4903,7 +4903,7 @@ static bool stmmac_rx_refill_zc(struct s
947 dma_wmb();
948 stmmac_set_rx_owner(priv, rx_desc, use_rx_wd);
949
950 - entry = STMMAC_GET_ENTRY(entry, priv->dma_rx_size);
951 + entry = STMMAC_GET_ENTRY(entry, priv->dma_conf.dma_rx_size);
952 }
953
954 if (rx_desc) {
955 @@ -4918,7 +4918,7 @@ static bool stmmac_rx_refill_zc(struct s
956
957 static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
958 {
959 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
960 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
961 unsigned int count = 0, error = 0, len = 0;
962 int dirty = stmmac_rx_dirty(priv, queue);
963 unsigned int next_entry = rx_q->cur_rx;
964 @@ -4940,7 +4940,7 @@ static int stmmac_rx_zc(struct stmmac_pr
965 desc_size = sizeof(struct dma_desc);
966 }
967
968 - stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true,
969 + stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true,
970 rx_q->dma_rx_phy, desc_size);
971 }
972 while (count < limit) {
973 @@ -4987,7 +4987,7 @@ read_again:
974
975 /* Prefetch the next RX descriptor */
976 rx_q->cur_rx = STMMAC_GET_ENTRY(rx_q->cur_rx,
977 - priv->dma_rx_size);
978 + priv->dma_conf.dma_rx_size);
979 next_entry = rx_q->cur_rx;
980
981 if (priv->extend_desc)
982 @@ -5108,7 +5108,7 @@ read_again:
983 */
984 static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
985 {
986 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
987 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
988 struct stmmac_channel *ch = &priv->channel[queue];
989 unsigned int count = 0, error = 0, len = 0;
990 int status = 0, coe = priv->hw->rx_csum;
991 @@ -5121,7 +5121,7 @@ static int stmmac_rx(struct stmmac_priv
992 int buf_sz;
993
994 dma_dir = page_pool_get_dma_dir(rx_q->page_pool);
995 - buf_sz = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
996 + buf_sz = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
997
998 if (netif_msg_rx_status(priv)) {
999 void *rx_head;
1000 @@ -5135,7 +5135,7 @@ static int stmmac_rx(struct stmmac_priv
1001 desc_size = sizeof(struct dma_desc);
1002 }
1003
1004 - stmmac_display_ring(priv, rx_head, priv->dma_rx_size, true,
1005 + stmmac_display_ring(priv, rx_head, priv->dma_conf.dma_rx_size, true,
1006 rx_q->dma_rx_phy, desc_size);
1007 }
1008 while (count < limit) {
1009 @@ -5179,7 +5179,7 @@ read_again:
1010 break;
1011
1012 rx_q->cur_rx = STMMAC_GET_ENTRY(rx_q->cur_rx,
1013 - priv->dma_rx_size);
1014 + priv->dma_conf.dma_rx_size);
1015 next_entry = rx_q->cur_rx;
1016
1017 if (priv->extend_desc)
1018 @@ -5313,7 +5313,7 @@ read_again:
1019 buf1_len, dma_dir);
1020 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1021 buf->page, buf->page_offset, buf1_len,
1022 - priv->dma_buf_sz);
1023 + priv->dma_conf.dma_buf_sz);
1024
1025 /* Data payload appended into SKB */
1026 page_pool_release_page(rx_q->page_pool, buf->page);
1027 @@ -5325,7 +5325,7 @@ read_again:
1028 buf2_len, dma_dir);
1029 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1030 buf->sec_page, 0, buf2_len,
1031 - priv->dma_buf_sz);
1032 + priv->dma_conf.dma_buf_sz);
1033
1034 /* Data payload appended into SKB */
1035 page_pool_release_page(rx_q->page_pool, buf->sec_page);
1036 @@ -5758,11 +5758,13 @@ static irqreturn_t stmmac_safety_interru
1037 static irqreturn_t stmmac_msi_intr_tx(int irq, void *data)
1038 {
1039 struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)data;
1040 + struct stmmac_dma_conf *dma_conf;
1041 int chan = tx_q->queue_index;
1042 struct stmmac_priv *priv;
1043 int status;
1044
1045 - priv = container_of(tx_q, struct stmmac_priv, tx_queue[chan]);
1046 + dma_conf = container_of(tx_q, struct stmmac_dma_conf, tx_queue[chan]);
1047 + priv = container_of(dma_conf, struct stmmac_priv, dma_conf);
1048
1049 /* Check if adapter is up */
1050 if (test_bit(STMMAC_DOWN, &priv->state))
1051 @@ -5797,10 +5799,12 @@ static irqreturn_t stmmac_msi_intr_tx(in
1052 static irqreturn_t stmmac_msi_intr_rx(int irq, void *data)
1053 {
1054 struct stmmac_rx_queue *rx_q = (struct stmmac_rx_queue *)data;
1055 + struct stmmac_dma_conf *dma_conf;
1056 int chan = rx_q->queue_index;
1057 struct stmmac_priv *priv;
1058
1059 - priv = container_of(rx_q, struct stmmac_priv, rx_queue[chan]);
1060 + dma_conf = container_of(rx_q, struct stmmac_dma_conf, rx_queue[chan]);
1061 + priv = container_of(dma_conf, struct stmmac_priv, dma_conf);
1062
1063 /* Check if adapter is up */
1064 if (test_bit(STMMAC_DOWN, &priv->state))
1065 @@ -5826,10 +5830,10 @@ static void stmmac_poll_controller(struc
1066
1067 if (priv->plat->multi_msi_en) {
1068 for (i = 0; i < priv->plat->rx_queues_to_use; i++)
1069 - stmmac_msi_intr_rx(0, &priv->rx_queue[i]);
1070 + stmmac_msi_intr_rx(0, &priv->dma_conf.rx_queue[i]);
1071
1072 for (i = 0; i < priv->plat->tx_queues_to_use; i++)
1073 - stmmac_msi_intr_tx(0, &priv->tx_queue[i]);
1074 + stmmac_msi_intr_tx(0, &priv->dma_conf.tx_queue[i]);
1075 } else {
1076 disable_irq(dev->irq);
1077 stmmac_interrupt(dev->irq, dev);
1078 @@ -6010,34 +6014,34 @@ static int stmmac_rings_status_show(stru
1079 return 0;
1080
1081 for (queue = 0; queue < rx_count; queue++) {
1082 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
1083 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
1084
1085 seq_printf(seq, "RX Queue %d:\n", queue);
1086
1087 if (priv->extend_desc) {
1088 seq_printf(seq, "Extended descriptor ring:\n");
1089 sysfs_display_ring((void *)rx_q->dma_erx,
1090 - priv->dma_rx_size, 1, seq, rx_q->dma_rx_phy);
1091 + priv->dma_conf.dma_rx_size, 1, seq, rx_q->dma_rx_phy);
1092 } else {
1093 seq_printf(seq, "Descriptor ring:\n");
1094 sysfs_display_ring((void *)rx_q->dma_rx,
1095 - priv->dma_rx_size, 0, seq, rx_q->dma_rx_phy);
1096 + priv->dma_conf.dma_rx_size, 0, seq, rx_q->dma_rx_phy);
1097 }
1098 }
1099
1100 for (queue = 0; queue < tx_count; queue++) {
1101 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
1102 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
1103
1104 seq_printf(seq, "TX Queue %d:\n", queue);
1105
1106 if (priv->extend_desc) {
1107 seq_printf(seq, "Extended descriptor ring:\n");
1108 sysfs_display_ring((void *)tx_q->dma_etx,
1109 - priv->dma_tx_size, 1, seq, tx_q->dma_tx_phy);
1110 + priv->dma_conf.dma_tx_size, 1, seq, tx_q->dma_tx_phy);
1111 } else if (!(tx_q->tbs & STMMAC_TBS_AVAIL)) {
1112 seq_printf(seq, "Descriptor ring:\n");
1113 sysfs_display_ring((void *)tx_q->dma_tx,
1114 - priv->dma_tx_size, 0, seq, tx_q->dma_tx_phy);
1115 + priv->dma_conf.dma_tx_size, 0, seq, tx_q->dma_tx_phy);
1116 }
1117 }
1118
1119 @@ -6384,7 +6388,7 @@ void stmmac_disable_rx_queue(struct stmm
1120
1121 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
1122 {
1123 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
1124 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
1125 struct stmmac_channel *ch = &priv->channel[queue];
1126 unsigned long flags;
1127 u32 buf_size;
1128 @@ -6421,7 +6425,7 @@ void stmmac_enable_rx_queue(struct stmma
1129 rx_q->queue_index);
1130 } else {
1131 stmmac_set_dma_bfsize(priv, priv->ioaddr,
1132 - priv->dma_buf_sz,
1133 + priv->dma_conf.dma_buf_sz,
1134 rx_q->queue_index);
1135 }
1136
1137 @@ -6447,7 +6451,7 @@ void stmmac_disable_tx_queue(struct stmm
1138
1139 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
1140 {
1141 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
1142 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
1143 struct stmmac_channel *ch = &priv->channel[queue];
1144 unsigned long flags;
1145 int ret;
1146 @@ -6497,7 +6501,7 @@ void stmmac_xdp_release(struct net_devic
1147 stmmac_disable_all_queues(priv);
1148
1149 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
1150 - hrtimer_cancel(&priv->tx_queue[chan].txtimer);
1151 + hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer);
1152
1153 /* Free the IRQ lines */
1154 stmmac_free_irq(dev, REQ_IRQ_ERR_ALL, 0);
1155 @@ -6556,7 +6560,7 @@ int stmmac_xdp_open(struct net_device *d
1156
1157 /* DMA RX Channel Configuration */
1158 for (chan = 0; chan < rx_cnt; chan++) {
1159 - rx_q = &priv->rx_queue[chan];
1160 + rx_q = &priv->dma_conf.rx_queue[chan];
1161
1162 stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
1163 rx_q->dma_rx_phy, chan);
1164 @@ -6574,7 +6578,7 @@ int stmmac_xdp_open(struct net_device *d
1165 rx_q->queue_index);
1166 } else {
1167 stmmac_set_dma_bfsize(priv, priv->ioaddr,
1168 - priv->dma_buf_sz,
1169 + priv->dma_conf.dma_buf_sz,
1170 rx_q->queue_index);
1171 }
1172
1173 @@ -6583,7 +6587,7 @@ int stmmac_xdp_open(struct net_device *d
1174
1175 /* DMA TX Channel Configuration */
1176 for (chan = 0; chan < tx_cnt; chan++) {
1177 - tx_q = &priv->tx_queue[chan];
1178 + tx_q = &priv->dma_conf.tx_queue[chan];
1179
1180 stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
1181 tx_q->dma_tx_phy, chan);
1182 @@ -6616,7 +6620,7 @@ int stmmac_xdp_open(struct net_device *d
1183
1184 irq_error:
1185 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
1186 - hrtimer_cancel(&priv->tx_queue[chan].txtimer);
1187 + hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer);
1188
1189 stmmac_hw_teardown(dev);
1190 init_error:
1191 @@ -6643,8 +6647,8 @@ int stmmac_xsk_wakeup(struct net_device
1192 queue >= priv->plat->tx_queues_to_use)
1193 return -EINVAL;
1194
1195 - rx_q = &priv->rx_queue[queue];
1196 - tx_q = &priv->tx_queue[queue];
1197 + rx_q = &priv->dma_conf.rx_queue[queue];
1198 + tx_q = &priv->dma_conf.tx_queue[queue];
1199 ch = &priv->channel[queue];
1200
1201 if (!rx_q->xsk_pool && !tx_q->xsk_pool)
1202 @@ -6904,8 +6908,8 @@ int stmmac_reinit_ringparam(struct net_d
1203 if (netif_running(dev))
1204 stmmac_release(dev);
1205
1206 - priv->dma_rx_size = rx_size;
1207 - priv->dma_tx_size = tx_size;
1208 + priv->dma_conf.dma_rx_size = rx_size;
1209 + priv->dma_conf.dma_tx_size = tx_size;
1210
1211 if (netif_running(dev))
1212 ret = stmmac_open(dev);
1213 @@ -7343,7 +7347,7 @@ int stmmac_suspend(struct device *dev)
1214 stmmac_disable_all_queues(priv);
1215
1216 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
1217 - hrtimer_cancel(&priv->tx_queue[chan].txtimer);
1218 + hrtimer_cancel(&priv->dma_conf.tx_queue[chan].txtimer);
1219
1220 if (priv->eee_enabled) {
1221 priv->tx_path_in_lpi_mode = false;
1222 @@ -7395,7 +7399,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
1223
1224 static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)
1225 {
1226 - struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
1227 + struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
1228
1229 rx_q->cur_rx = 0;
1230 rx_q->dirty_rx = 0;
1231 @@ -7403,7 +7407,7 @@ static void stmmac_reset_rx_queue(struct
1232
1233 static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue)
1234 {
1235 - struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
1236 + struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
1237
1238 tx_q->cur_tx = 0;
1239 tx_q->dirty_tx = 0;
1240 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c
1241 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c
1242 @@ -795,8 +795,8 @@ static int stmmac_test_flowctrl(struct s
1243 struct stmmac_channel *ch = &priv->channel[i];
1244 u32 tail;
1245
1246 - tail = priv->rx_queue[i].dma_rx_phy +
1247 - (priv->dma_rx_size * sizeof(struct dma_desc));
1248 + tail = priv->dma_conf.rx_queue[i].dma_rx_phy +
1249 + (priv->dma_conf.dma_rx_size * sizeof(struct dma_desc));
1250
1251 stmmac_set_rx_tail_ptr(priv, priv->ioaddr, tail, i);
1252 stmmac_start_rx(priv, priv->ioaddr, i);
1253 @@ -1684,7 +1684,7 @@ cleanup:
1254 static int __stmmac_test_jumbo(struct stmmac_priv *priv, u16 queue)
1255 {
1256 struct stmmac_packet_attrs attr = { };
1257 - int size = priv->dma_buf_sz;
1258 + int size = priv->dma_conf.dma_buf_sz;
1259
1260 attr.dst = priv->dev->dev_addr;
1261 attr.max_size = size - ETH_FCS_LEN;
1262 @@ -1767,7 +1767,7 @@ static int stmmac_test_tbs(struct stmmac
1263
1264 /* Find first TBS enabled Queue, if any */
1265 for (i = 0; i < priv->plat->tx_queues_to_use; i++)
1266 - if (priv->tx_queue[i].tbs & STMMAC_TBS_AVAIL)
1267 + if (priv->dma_conf.tx_queue[i].tbs & STMMAC_TBS_AVAIL)
1268 break;
1269
1270 if (i >= priv->plat->tx_queues_to_use)
1271 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
1272 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
1273 @@ -971,13 +971,13 @@ static int tc_setup_etf(struct stmmac_pr
1274 return -EOPNOTSUPP;
1275 if (qopt->queue >= priv->plat->tx_queues_to_use)
1276 return -EINVAL;
1277 - if (!(priv->tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL))
1278 + if (!(priv->dma_conf.tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL))
1279 return -EINVAL;
1280
1281 if (qopt->enable)
1282 - priv->tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN;
1283 + priv->dma_conf.tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN;
1284 else
1285 - priv->tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN;
1286 + priv->dma_conf.tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN;
1287
1288 netdev_info(priv->dev, "%s ETF for Queue %d\n",
1289 qopt->enable ? "enabled" : "disabled", qopt->queue);
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