0ed7ed41fbe6c4494aa0db308cfa70efc95b8c36
[openwrt/staging/dangole.git] /
1 From 910746444313dc463396cd63024cdf54ef04ef39 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Wed, 27 Jul 2022 13:35:14 +0200
4 Subject: [PATCH 05/14] net: dsa: qca8k: move qca8k bulk read/write helper to
5 common code
6
7 The same ATU function are used by drivers based on qca8k family switch.
8 Move the bulk read/write helper to common code to declare these shared
9 ATU functions in common code.
10 These helper will be dropped when regmap correctly support bulk
11 read/write.
12
13 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
14 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
15 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
16 ---
17 drivers/net/dsa/qca/qca8k-8xxx.c | 39 ++----------------------------
18 drivers/net/dsa/qca/qca8k-common.c | 39 ++++++++++++++++++++++++++++++
19 drivers/net/dsa/qca/qca8k.h | 8 ++++++
20 3 files changed, 49 insertions(+), 37 deletions(-)
21
22 --- a/drivers/net/dsa/qca/qca8k-8xxx.c
23 +++ b/drivers/net/dsa/qca/qca8k-8xxx.c
24 @@ -343,43 +343,6 @@ qca8k_regmap_update_bits_eth(struct qca8
25 }
26
27 static int
28 -qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
29 -{
30 - int i, count = len / sizeof(u32), ret;
31 -
32 - if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len))
33 - return 0;
34 -
35 - for (i = 0; i < count; i++) {
36 - ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
37 - if (ret < 0)
38 - return ret;
39 - }
40 -
41 - return 0;
42 -}
43 -
44 -static int
45 -qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
46 -{
47 - int i, count = len / sizeof(u32), ret;
48 - u32 tmp;
49 -
50 - if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len))
51 - return 0;
52 -
53 - for (i = 0; i < count; i++) {
54 - tmp = val[i];
55 -
56 - ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
57 - if (ret < 0)
58 - return ret;
59 - }
60 -
61 - return 0;
62 -}
63 -
64 -static int
65 qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
66 {
67 struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
68 @@ -3096,6 +3059,8 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
69
70 static const struct qca8k_info_ops qca8xxx_ops = {
71 .autocast_mib = qca8k_get_ethtool_stats_eth,
72 + .read_eth = qca8k_read_eth,
73 + .write_eth = qca8k_write_eth,
74 };
75
76 static const struct qca8k_match_data qca8327 = {
77 --- a/drivers/net/dsa/qca/qca8k-common.c
78 +++ b/drivers/net/dsa/qca/qca8k-common.c
79 @@ -99,3 +99,42 @@ const struct regmap_access_table qca8k_r
80 .yes_ranges = qca8k_readable_ranges,
81 .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
82 };
83 +
84 +/* TODO: remove these extra ops when we can support regmap bulk read/write */
85 +int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
86 +{
87 + int i, count = len / sizeof(u32), ret;
88 +
89 + if (priv->mgmt_master && priv->info->ops->read_eth &&
90 + !priv->info->ops->read_eth(priv, reg, val, len))
91 + return 0;
92 +
93 + for (i = 0; i < count; i++) {
94 + ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
95 + if (ret < 0)
96 + return ret;
97 + }
98 +
99 + return 0;
100 +}
101 +
102 +/* TODO: remove these extra ops when we can support regmap bulk read/write */
103 +int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
104 +{
105 + int i, count = len / sizeof(u32), ret;
106 + u32 tmp;
107 +
108 + if (priv->mgmt_master && priv->info->ops->write_eth &&
109 + !priv->info->ops->write_eth(priv, reg, val, len))
110 + return 0;
111 +
112 + for (i = 0; i < count; i++) {
113 + tmp = val[i];
114 +
115 + ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
116 + if (ret < 0)
117 + return ret;
118 + }
119 +
120 + return 0;
121 +}
122 --- a/drivers/net/dsa/qca/qca8k.h
123 +++ b/drivers/net/dsa/qca/qca8k.h
124 @@ -324,8 +324,13 @@ enum qca8k_mid_cmd {
125 QCA8K_MIB_CAST = 3,
126 };
127
128 +struct qca8k_priv;
129 +
130 struct qca8k_info_ops {
131 int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);
132 + /* TODO: remove these extra ops when we can support regmap bulk read/write */
133 + int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
134 + int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
135 };
136
137 struct qca8k_match_data {
138 @@ -423,4 +428,7 @@ int qca8k_read(struct qca8k_priv *priv,
139 int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val);
140 int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val);
141
142 +int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
143 +int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
144 +
145 #endif /* __QCA8K_H */