0bb3673c02c1337f8a1fbd55e8a03fcc1cb0514b
[openwrt/staging/wigyori.git] /
1 From 8e732f1c6f2dc5e18f766d0f1b11df9db2dd044a Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Thu, 14 Dec 2023 01:44:31 +0100
4 Subject: [PATCH 1/2] net: phy: at803x: move specific qca808x config_aneg to
5 dedicated function
6
7 Move specific qca808x config_aneg to dedicated function to permit easier
8 split of qca808x portion from at803x driver.
9
10 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
12 ---
13 drivers/net/phy/at803x.c | 66 ++++++++++++++++++++++++----------------
14 1 file changed, 40 insertions(+), 26 deletions(-)
15
16 --- a/drivers/net/phy/at803x.c
17 +++ b/drivers/net/phy/at803x.c
18 @@ -1045,9 +1045,8 @@ static int at803x_config_mdix(struct phy
19 FIELD_PREP(AT803X_SFC_MDI_CROSSOVER_MODE_M, val));
20 }
21
22 -static int at803x_config_aneg(struct phy_device *phydev)
23 +static int at803x_prepare_config_aneg(struct phy_device *phydev)
24 {
25 - struct at803x_priv *priv = phydev->priv;
26 int ret;
27
28 ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
29 @@ -1064,33 +1063,22 @@ static int at803x_config_aneg(struct phy
30 return ret;
31 }
32
33 - if (priv->is_1000basex)
34 - return genphy_c37_config_aneg(phydev);
35 -
36 - /* Do not restart auto-negotiation by setting ret to 0 defautly,
37 - * when calling __genphy_config_aneg later.
38 - */
39 - ret = 0;
40 -
41 - if (phydev->drv->phy_id == QCA8081_PHY_ID) {
42 - int phy_ctrl = 0;
43 + return 0;
44 +}
45
46 - /* The reg MII_BMCR also needs to be configured for force mode, the
47 - * genphy_config_aneg is also needed.
48 - */
49 - if (phydev->autoneg == AUTONEG_DISABLE)
50 - genphy_c45_pma_setup_forced(phydev);
51 +static int at803x_config_aneg(struct phy_device *phydev)
52 +{
53 + struct at803x_priv *priv = phydev->priv;
54 + int ret;
55
56 - if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
57 - phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
58 + ret = at803x_prepare_config_aneg(phydev);
59 + if (ret)
60 + return ret;
61
62 - ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
63 - MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
64 - if (ret < 0)
65 - return ret;
66 - }
67 + if (priv->is_1000basex)
68 + return genphy_c37_config_aneg(phydev);
69
70 - return __genphy_config_aneg(phydev, ret);
71 + return genphy_config_aneg(phydev);
72 }
73
74 static int at803x_get_downshift(struct phy_device *phydev, u8 *d)
75 @@ -2118,6 +2106,32 @@ static int qca808x_get_features(struct p
76 return 0;
77 }
78
79 +static int qca808x_config_aneg(struct phy_device *phydev)
80 +{
81 + int phy_ctrl = 0;
82 + int ret;
83 +
84 + ret = at803x_prepare_config_aneg(phydev);
85 + if (ret)
86 + return ret;
87 +
88 + /* The reg MII_BMCR also needs to be configured for force mode, the
89 + * genphy_config_aneg is also needed.
90 + */
91 + if (phydev->autoneg == AUTONEG_DISABLE)
92 + genphy_c45_pma_setup_forced(phydev);
93 +
94 + if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
95 + phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
96 +
97 + ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
98 + MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
99 + if (ret < 0)
100 + return ret;
101 +
102 + return __genphy_config_aneg(phydev, ret);
103 +}
104 +
105 static void qca808x_link_change_notify(struct phy_device *phydev)
106 {
107 /* Assert interface sgmii fifo on link down, deassert it on link up,
108 @@ -2295,7 +2309,7 @@ static struct phy_driver at803x_driver[]
109 .set_wol = at803x_set_wol,
110 .get_wol = at803x_get_wol,
111 .get_features = qca808x_get_features,
112 - .config_aneg = at803x_config_aneg,
113 + .config_aneg = qca808x_config_aneg,
114 .suspend = genphy_suspend,
115 .resume = genphy_resume,
116 .read_status = qca808x_read_status,