git.openwrt.org Git - openwrt/staging/ynezz.git/blob

   1 From 9f2c0bf1e2f3784e1f991ab30bba83ffd79b8a19 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Mon, 5 Jul 2021 10:48:07 +0200
   4 Subject: [PATCH] drm/vc4: hdmi: Move initial register read after
   5  pm_runtime_get
   6
   7 Commit ecdd08fd9bba ("drm/vc4: hdmi: Make sure the device is powered
   8 with CEC") made sure that the device is powered while there is
   9 CEC-related accesses but missed one register read in the variable
  10 declaration.
  11
  12 Move the variable assignment after the pm_runtime_resume_and_get.
  13
  14 Fixes: ecdd08fd9bba ("drm/vc4: hdmi: Make sure the device is powered with CEC")
  15 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  16 ---
  17  drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++-
  18  1 file changed, 2 insertions(+), 1 deletion(-)
  19
  20 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  21 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  22 @@ -1761,13 +1761,14 @@ static int vc4_hdmi_cec_enable(struct ce
  23         struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
  24         /* clock period in microseconds */
  25         const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
  26 -       u32 val = HDMI_READ(HDMI_CEC_CNTRL_5);
  27 +       u32 val;
  28         int ret;
  29
  30         ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
  31         if (ret)
  32                 return ret;
  33
  34 +       val = HDMI_READ(HDMI_CEC_CNTRL_5);
  35         val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
  36                  VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
  37                  VC4_HDMI_CEC_CNT_TO_4500_US_MASK);