git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From 31fd9b79dc580301c53a001482755ba7e88c2809 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Fri, 29 Oct 2021 18:05:23 +0200
   4 Subject: [PATCH] ARM: dts: BCM5301X: update CRU block description
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 This describes CRU in a way matching documentation and fixes:
  10
  11 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: cru@100: $nodename:0: 'cru@100' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
  12         From schema: /lib/python3.6/site-packages/dtschema/schemas/simple-bus.yaml
  13
  14 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  15 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  16 ---
  17  arch/arm/boot/dts/bcm5301x.dtsi | 13 +++++++++----
  18  1 file changed, 9 insertions(+), 4 deletions(-)
  19
  20 --- a/arch/arm/boot/dts/bcm5301x.dtsi
  21 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
  22 @@ -423,14 +423,14 @@
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25
  26 -               cru@100 {
  27 -                       compatible = "simple-bus";
  28 +               cru-bus@100 {
  29 +                       compatible = "brcm,ns-cru", "simple-mfd";
  30                         reg = <0x100 0x1a4>;
  31                         ranges;
  32                         #address-cells = <1>;
  33                         #size-cells = <1>;
  34
  35 -                       lcpll0: lcpll0@100 {
  36 +                       lcpll0: clock-controller@100 {
  37                                 #clock-cells = <1>;
  38                                 compatible = "brcm,nsp-lcpll0";
  39                                 reg = <0x100 0x14>;
  40 @@ -439,7 +439,7 @@
  41                                                      "sdio", "ddr_phy";
  42                         };
  43
  44 -                       genpll: genpll@140 {
  45 +                       genpll: clock-controller@140 {
  46                                 #clock-cells = <1>;
  47                                 compatible = "brcm,nsp-genpll";
  48                                 reg = <0x140 0x24>;
  49 @@ -450,6 +450,11 @@
  50                                                      "sata1", "sata2";
  51                         };
  52
  53 +                       syscon@180 {
  54 +                               compatible = "brcm,cru-clkset", "syscon";
  55 +                               reg = <0x180 0x4>;
  56 +                       };
  57 +
  58                         pinctrl: pin-controller@1c0 {
  59                                 compatible = "brcm,bcm4708-pinmux";
  60                                 reg = <0x1c0 0x24>;