git.openwrt.org Git - openwrt/staging/mans0n.git/blob

   1 From f8554985b77df2dac55f2d7c85e0f0cc3497a1fd Mon Sep 17 00:00:00 2001
   2 From: Yaroslav Rosomakho <yaroslavros@gmail.com>
   3 Date: Fri, 23 Aug 2019 11:05:51 +0200
   4 Subject: [PATCH] Add missing dma_unmap_sg calls to free relevant
   5  swiotlb bounce buffers. This prevents DMA leaks.
   6
   7 Signed-off-by: Yaroslav Rosomakho <yaroslavros@gmail.com>
   8 ---
   9  drivers/mmc/host/bcm2835-mmc.c | 15 +++++++++------
  10  1 file changed, 9 insertions(+), 6 deletions(-)
  11
  12 --- a/drivers/mmc/host/bcm2835-mmc.c
  13 +++ b/drivers/mmc/host/bcm2835-mmc.c
  14 @@ -345,16 +345,17 @@ static void bcm2835_mmc_dma_complete(voi
  15
  16         host->use_dma = false;
  17
  18 -       if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
  19 -               /* otherwise handled in SDHCI IRQ */
  20 +       if (host->data) {
  21                 dma_chan = host->dma_chan_rxtx;
  22 -               dir_data = DMA_FROM_DEVICE;
  23 -
  24 +               if (host->data->flags & MMC_DATA_WRITE)
  25 +                       dir_data = DMA_TO_DEVICE;
  26 +               else
  27 +                       dir_data = DMA_FROM_DEVICE;
  28                 dma_unmap_sg(dma_chan->device->dev,
  29                      host->data->sg, host->data->sg_len,
  30                      dir_data);
  31 -
  32 -               bcm2835_mmc_finish_data(host);
  33 +               if (! (host->data->flags & MMC_DATA_WRITE))
  34 +                       bcm2835_mmc_finish_data(host);
  35         } else if (host->wait_for_dma) {
  36                 host->wait_for_dma = false;
  37                 tasklet_schedule(&host->finish_tasklet);
  38 @@ -540,6 +541,8 @@ static void bcm2835_mmc_transfer_dma(str
  39                 spin_unlock_irqrestore(&host->lock, flags);
  40                 dmaengine_submit(desc);
  41                 dma_async_issue_pending(dma_chan);
  42 +       } else {
  43 +               dma_unmap_sg(dma_chan->device->dev, host->data->sg, len, dir_data);
  44         }
  45
  46  }