git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From: Florian Fainelli <f.fainelli@gmail.com>
   2 Subject: [PATCH v3 5/9] mtd: rawnand: brcmnand: Allow working without interrupts
   3 Date: Fri, 07 Jan 2022 10:46:10 -0800
   4 Content-Type: text/plain; charset="utf-8"
   5
   6 The BCMA devices include the brcmnand controller but they do not wire up
   7 any interrupt line, allow the main interrupt to be optional and update
   8 the completion path to also check for the lack of an interrupt line.
   9
  10 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  11 ---
  12  drivers/mtd/nand/raw/brcmnand/brcmnand.c | 52 +++++++++++-------------
  13  1 file changed, 24 insertions(+), 28 deletions(-)
  14
  15 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
  16 +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
  17 @@ -216,7 +216,7 @@ struct brcmnand_controller {
  18         void __iomem            *nand_base;
  19         void __iomem            *nand_fc; /* flash cache */
  20         void __iomem            *flash_dma_base;
  21 -       unsigned int            irq;
  22 +       int                     irq;
  23         unsigned int            dma_irq;
  24         int                     nand_version;
  25
  26 @@ -1650,7 +1650,7 @@ static bool brcmstb_nand_wait_for_comple
  27         bool err = false;
  28         int sts;
  29
  30 -       if (mtd->oops_panic_write) {
  31 +       if (mtd->oops_panic_write || ctrl->irq < 0) {
  32                 /* switch to interrupt polling and PIO mode */
  33                 disable_ctrl_irqs(ctrl);
  34                 sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY,
  35 @@ -3191,33 +3191,29 @@ int brcmnand_probe(struct platform_devic
  36         }
  37
  38         /* IRQ */
  39 -       ctrl->irq = platform_get_irq(pdev, 0);
  40 -       if ((int)ctrl->irq < 0) {
  41 -               dev_err(dev, "no IRQ defined\n");
  42 -               ret = -ENODEV;
  43 -               goto err;
  44 -       }
  45 -
  46 -       /*
  47 -        * Some SoCs integrate this controller (e.g., its interrupt bits) in
  48 -        * interesting ways
  49 -        */
  50 -       if (soc) {
  51 -               ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
  52 -                                      DRV_NAME, ctrl);
  53 -
  54 -               /* Enable interrupt */
  55 -               ctrl->soc->ctlrdy_ack(ctrl->soc);
  56 -               ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
  57 -       } else {
  58 -               /* Use standard interrupt infrastructure */
  59 -               ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
  60 -                                      DRV_NAME, ctrl);
  61 -       }
  62 -       if (ret < 0) {
  63 -               dev_err(dev, "can't allocate IRQ %d: error %d\n",
  64 -                       ctrl->irq, ret);
  65 -               goto err;
  66 +       ctrl->irq = platform_get_irq_optional(pdev, 0);
  67 +       if (ctrl->irq > 0) {
  68 +               /*
  69 +                * Some SoCs integrate this controller (e.g., its interrupt bits) in
  70 +                * interesting ways
  71 +                */
  72 +               if (soc) {
  73 +                       ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
  74 +                                              DRV_NAME, ctrl);
  75 +
  76 +                       /* Enable interrupt */
  77 +                       ctrl->soc->ctlrdy_ack(ctrl->soc);
  78 +                       ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
  79 +               } else {
  80 +                       /* Use standard interrupt infrastructure */
  81 +                       ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
  82 +                                              DRV_NAME, ctrl);
  83 +               }
  84 +               if (ret < 0) {
  85 +                       dev_err(dev, "can't allocate IRQ %d: error %d\n",
  86 +                               ctrl->irq, ret);
  87 +                       goto err;
  88 +               }
  89         }
  90
  91         for_each_available_child_of_node(dn, child) {