git.openwrt.org Git - openwrt/staging/nbd.git/blob

   1 From 21400f252a97755579b43a4dc95dd02cd7f0ca75 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
   3 Date: Wed, 3 Sep 2014 22:59:45 +0200
   4 Subject: [PATCH 155/158] MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx
   5  polling it
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 This makes NVRAM code less bcm47xx/ssb specific allowing it to become a
  11 standalone driver in the future. A similar patch for bcma will follow
  12 when it's ready.
  13
  14 Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
  15 Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
  16 Cc: linux-mips@linux-mips.org
  17 Patchwork: https://patchwork.linux-mips.org/patch/7612/
  18 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  19 ---
  20  arch/mips/bcm47xx/nvram.c                          | 30 +++++++---------------
  21  arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h |  1 +
  22  drivers/ssb/driver_mipscore.c                      | 14 +++++++++-
  23  3 files changed, 23 insertions(+), 22 deletions(-)
  24
  25 diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
  26 index e07976b..fecc5ae 100644
  27 --- a/arch/mips/bcm47xx/nvram.c
  28 +++ b/arch/mips/bcm47xx/nvram.c
  29 @@ -98,7 +98,14 @@ found:
  30         return 0;
  31  }
  32
  33 -static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
  34 +/*
  35 + * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
  36 + * subsystem to access flash. We can't even use platform device / driver to
  37 + * store memory offset.
  38 + * To handle this we provide following symbol. It's supposed to be called as
  39 + * soon as we get info about flash device, before any NVRAM entry is needed.
  40 + */
  41 +int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
  42  {
  43         void __iomem *iobase;
  44         int err;
  45 @@ -114,25 +121,6 @@ static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
  46         return err;
  47  }
  48
  49 -#ifdef CONFIG_BCM47XX_SSB
  50 -static int nvram_init_ssb(void)
  51 -{
  52 -       struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
  53 -       u32 base;
  54 -       u32 lim;
  55 -
  56 -       if (mcore->pflash.present) {
  57 -               base = mcore->pflash.window;
  58 -               lim = mcore->pflash.window_size;
  59 -       } else {
  60 -               pr_err("Couldn't find supported flash memory\n");
  61 -               return -ENXIO;
  62 -       }
  63 -
  64 -       return bcm47xx_nvram_init_from_mem(base, lim);
  65 -}
  66 -#endif
  67 -
  68  #ifdef CONFIG_BCM47XX_BCMA
  69  static int nvram_init_bcma(void)
  70  {
  71 @@ -168,7 +156,7 @@ static int nvram_init(void)
  72         switch (bcm47xx_bus_type) {
  73  #ifdef CONFIG_BCM47XX_SSB
  74         case BCM47XX_BUS_TYPE_SSB:
  75 -               return nvram_init_ssb();
  76 +               break;
  77  #endif
  78  #ifdef CONFIG_BCM47XX_BCMA
  79         case BCM47XX_BUS_TYPE_BCMA:
  80 diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
  81 index 36a3fc1..676be22 100644
  82 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
  83 +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
  84 @@ -32,6 +32,7 @@ struct nvram_header {
  85  #define NVRAM_MAX_VALUE_LEN 255
  86  #define NVRAM_MAX_PARAM_LEN 64
  87
  88 +int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
  89  extern int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len);
  90
  91  static inline void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
  92 diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c
  93 index 0907706..7b986f9 100644
  94 --- a/drivers/ssb/driver_mipscore.c
  95 +++ b/drivers/ssb/driver_mipscore.c
  96 @@ -15,6 +15,9 @@
  97  #include <linux/serial_core.h>
  98  #include <linux/serial_reg.h>
  99  #include <linux/time.h>
 100 +#ifdef CONFIG_BCM47XX
 101 +#include <bcm47xx_nvram.h>
 102 +#endif
 103
 104  #include "ssb_private.h"
 105
 106 @@ -210,6 +213,7 @@ static void ssb_mips_serial_init(struct ssb_mipscore *mcore)
 107  static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
 108  {
 109         struct ssb_bus *bus = mcore->dev->bus;
 110 +       struct ssb_sflash *sflash = &mcore->sflash;
 111         struct ssb_pflash *pflash = &mcore->pflash;
 112
 113         /* When there is no chipcommon on the bus there is 4MB flash */
 114 @@ -242,7 +246,15 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
 115         }
 116
 117  ssb_pflash:
 118 -       if (pflash->present) {
 119 +       if (sflash->present) {
 120 +#ifdef CONFIG_BCM47XX
 121 +               bcm47xx_nvram_init_from_mem(sflash->window, sflash->size);
 122 +#endif
 123 +       } else if (pflash->present) {
 124 +#ifdef CONFIG_BCM47XX
 125 +               bcm47xx_nvram_init_from_mem(pflash->window, pflash->window_size);
 126 +#endif
 127 +
 128                 ssb_pflash_data.width = pflash->buswidth;
 129                 ssb_pflash_resource.start = pflash->window;
 130                 ssb_pflash_resource.end = pflash->window + pflash->window_size;
 131 --
 132 1.8.4.5
 133