git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 050b312654523aac9495eae3cf7bfa868fd981ce Mon Sep 17 00:00:00 2001
   2 From: Luo Jie <quic_luoj@quicinc.com>
   3 Date: Fri, 3 Jan 2025 15:31:38 +0800
   4 Subject: [PATCH 3/3] arm64: dts: qcom: ipq9574: Update xo_board_clk to use
   5  fixed factor clock
   6
   7 xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock
   8 48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog
   9 block routing channel.
  10
  11 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
  12 Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
  13 Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-5-c89fb4d4849d@quicinc.com
  14 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  15 ---
  16  arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 7 ++++++-
  17  arch/arm64/boot/dts/qcom/ipq9574.dtsi            | 3 ++-
  18  2 files changed, 8 insertions(+), 2 deletions(-)
  19
  20 diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
  21 index bb1ff79360d3..ae12f069f26f 100644
  22 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
  23 +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
  24 @@ -175,8 +175,13 @@ &ref_48mhz_clk {
  25         clock-mult = <1>;
  26  };
  27
  28 +/*
  29 + * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed
  30 + * from WiFi output clock 48 MHZ divided by 2.
  31 + */
  32  &xo_board_clk {
  33 -       clock-frequency = <24000000>;
  34 +       clock-div = <2>;
  35 +       clock-mult = <1>;
  36  };
  37
  38  &xo_clk {
  39 diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  40 index c543c3492e93..3e93484e7e32 100644
  41 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  42 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
  43 @@ -32,7 +32,8 @@ sleep_clk: sleep-clk {
  44                 };
  45
  46                 xo_board_clk: xo-board-clk {
  47 -                       compatible = "fixed-clock";
  48 +                       compatible = "fixed-factor-clock";
  49 +                       clocks = <&ref_48mhz_clk>;
  50                         #clock-cells = <0>;
  51                 };
  52
  53 --
  54 2.47.1
  55