git.openwrt.org Git - openwrt/staging/dangole.git/blob

   1 From 20d4fd84bf524ad91e2cc3e4ab4020c27cfc0081 Mon Sep 17 00:00:00 2001
   2 From: Rajendra Nayak <rnayak@codeaurora.org>
   3 Date: Thu, 5 May 2016 14:21:43 +0530
   4 Subject: thermal: qcom: tsens-8960: Add support for 8960 family of SoCs
   5
   6 8960 family of SoCs have the TSENS device as part of GCC, hence
   7 the driver probes the virtual child device created by GCC and
   8 uses the parent to extract all DT properties and reuses the GCC
   9 regmap.
  10
  11 Also GCC/TSENS are part of a  domain thats not always ON.
  12 Hence add .suspend and .resume hooks to save and restore some of
  13 the inited register context.
  14
  15 Also 8960 family have some of the TSENS init sequence thats
  16 required to be done by the HLOS driver (some later versions of TSENS
  17 do not export these registers to non-secure world, and hence need
  18 these initializations to be done by secure bootloaders)
  19
  20 8660 from the same family has just one sensor and hence some register
  21 offset/layout differences which need special handling in the driver.
  22
  23 Based on the original code from Siddartha Mohanadoss, Stephen Boyd and
  24 Narendran Rajan.
  25
  26 Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
  27 Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
  28 Signed-off-by: Zhang Rui <rui.zhang@intel.com>
  29 ---
  30  drivers/thermal/qcom/Makefile     |   2 +-
  31  drivers/thermal/qcom/tsens-8960.c | 292 ++++++++++++++++++++++++++++++++++++++
  32  drivers/thermal/qcom/tsens.c      |   8 +-
  33  drivers/thermal/qcom/tsens.h      |   2 +-
  34  4 files changed, 298 insertions(+), 6 deletions(-)
  35  create mode 100644 drivers/thermal/qcom/tsens-8960.c
  36
  37 --- a/drivers/thermal/qcom/Makefile
  38 +++ b/drivers/thermal/qcom/Makefile
  39 @@ -1,2 +1,2 @@
  40  obj-$(CONFIG_QCOM_TSENS)       += qcom_tsens.o
  41 -qcom_tsens-y                   += tsens.o tsens-common.o tsens-8916.o tsens-8974.o
  42 +qcom_tsens-y                   += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o
  43 --- /dev/null
  44 +++ b/drivers/thermal/qcom/tsens-8960.c
  45 @@ -0,0 +1,292 @@
  46 +/*
  47 + * Copyright (c) 2015, The Linux Foundation. All rights reserved.
  48 + *
  49 + * This program is free software; you can redistribute it and/or modify
  50 + * it under the terms of the GNU General Public License version 2 and
  51 + * only version 2 as published by the Free Software Foundation.
  52 + *
  53 + * This program is distributed in the hope that it will be useful,
  54 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  55 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  56 + * GNU General Public License for more details.
  57 + *
  58 + */
  59 +
  60 +#include <linux/platform_device.h>
  61 +#include <linux/delay.h>
  62 +#include <linux/bitops.h>
  63 +#include <linux/regmap.h>
  64 +#include <linux/thermal.h>
  65 +#include "tsens.h"
  66 +
  67 +#define CAL_MDEGC              30000
  68 +
  69 +#define CONFIG_ADDR            0x3640
  70 +#define CONFIG_ADDR_8660       0x3620
  71 +/* CONFIG_ADDR bitmasks */
  72 +#define CONFIG                 0x9b
  73 +#define CONFIG_MASK            0xf
  74 +#define CONFIG_8660            1
  75 +#define CONFIG_SHIFT_8660      28
  76 +#define CONFIG_MASK_8660       (3 << CONFIG_SHIFT_8660)
  77 +
  78 +#define STATUS_CNTL_ADDR_8064  0x3660
  79 +#define CNTL_ADDR              0x3620
  80 +/* CNTL_ADDR bitmasks */
  81 +#define EN                     BIT(0)
  82 +#define SW_RST                 BIT(1)
  83 +#define SENSOR0_EN             BIT(3)
  84 +#define SLP_CLK_ENA            BIT(26)
  85 +#define SLP_CLK_ENA_8660       BIT(24)
  86 +#define MEASURE_PERIOD         1
  87 +#define SENSOR0_SHIFT          3
  88 +
  89 +/* INT_STATUS_ADDR bitmasks */
  90 +#define MIN_STATUS_MASK                BIT(0)
  91 +#define LOWER_STATUS_CLR       BIT(1)
  92 +#define UPPER_STATUS_CLR       BIT(2)
  93 +#define MAX_STATUS_MASK                BIT(3)
  94 +
  95 +#define THRESHOLD_ADDR         0x3624
  96 +/* THRESHOLD_ADDR bitmasks */
  97 +#define THRESHOLD_MAX_LIMIT_SHIFT      24
  98 +#define THRESHOLD_MIN_LIMIT_SHIFT      16
  99 +#define THRESHOLD_UPPER_LIMIT_SHIFT    8
 100 +#define THRESHOLD_LOWER_LIMIT_SHIFT    0
 101 +
 102 +/* Initial temperature threshold values */
 103 +#define LOWER_LIMIT_TH         0x50
 104 +#define UPPER_LIMIT_TH         0xdf
 105 +#define MIN_LIMIT_TH           0x0
 106 +#define MAX_LIMIT_TH           0xff
 107 +
 108 +#define S0_STATUS_ADDR         0x3628
 109 +#define INT_STATUS_ADDR                0x363c
 110 +#define TRDY_MASK              BIT(7)
 111 +#define TIMEOUT_US             100
 112 +
 113 +static int suspend_8960(struct tsens_device *tmdev)
 114 +{
 115 +       int ret;
 116 +       unsigned int mask;
 117 +       struct regmap *map = tmdev->map;
 118 +
 119 +       ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold);
 120 +       if (ret)
 121 +               return ret;
 122 +
 123 +       ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control);
 124 +       if (ret)
 125 +               return ret;
 126 +
 127 +       if (tmdev->num_sensors > 1)
 128 +               mask = SLP_CLK_ENA | EN;
 129 +       else
 130 +               mask = SLP_CLK_ENA_8660 | EN;
 131 +
 132 +       ret = regmap_update_bits(map, CNTL_ADDR, mask, 0);
 133 +       if (ret)
 134 +               return ret;
 135 +
 136 +       return 0;
 137 +}
 138 +
 139 +static int resume_8960(struct tsens_device *tmdev)
 140 +{
 141 +       int ret;
 142 +       struct regmap *map = tmdev->map;
 143 +
 144 +       ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST);
 145 +       if (ret)
 146 +               return ret;
 147 +
 148 +       /*
 149 +        * Separate CONFIG restore is not needed only for 8660 as
 150 +        * config is part of CTRL Addr and its restored as such
 151 +        */
 152 +       if (tmdev->num_sensors > 1) {
 153 +               ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG);
 154 +               if (ret)
 155 +                       return ret;
 156 +       }
 157 +
 158 +       ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold);
 159 +       if (ret)
 160 +               return ret;
 161 +
 162 +       ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control);
 163 +       if (ret)
 164 +               return ret;
 165 +
 166 +       return 0;
 167 +}
 168 +
 169 +static int enable_8960(struct tsens_device *tmdev, int id)
 170 +{
 171 +       int ret;
 172 +       u32 reg, mask;
 173 +
 174 +       ret = regmap_read(tmdev->map, CNTL_ADDR, &reg);
 175 +       if (ret)
 176 +               return ret;
 177 +
 178 +       mask = BIT(id + SENSOR0_SHIFT);
 179 +       ret = regmap_write(tmdev->map, CNTL_ADDR, reg | SW_RST);
 180 +       if (ret)
 181 +               return ret;
 182 +
 183 +       if (tmdev->num_sensors > 1)
 184 +               reg |= mask | SLP_CLK_ENA | EN;
 185 +       else
 186 +               reg |= mask | SLP_CLK_ENA_8660 | EN;
 187 +
 188 +       ret = regmap_write(tmdev->map, CNTL_ADDR, reg);
 189 +       if (ret)
 190 +               return ret;
 191 +
 192 +       return 0;
 193 +}
 194 +
 195 +static void disable_8960(struct tsens_device *tmdev)
 196 +{
 197 +       int ret;
 198 +       u32 reg_cntl;
 199 +       u32 mask;
 200 +
 201 +       mask = GENMASK(tmdev->num_sensors - 1, 0);
 202 +       mask <<= SENSOR0_SHIFT;
 203 +       mask |= EN;
 204 +
 205 +       ret = regmap_read(tmdev->map, CNTL_ADDR, &reg_cntl);
 206 +       if (ret)
 207 +               return;
 208 +
 209 +       reg_cntl &= ~mask;
 210 +
 211 +       if (tmdev->num_sensors > 1)
 212 +               reg_cntl &= ~SLP_CLK_ENA;
 213 +       else
 214 +               reg_cntl &= ~SLP_CLK_ENA_8660;
 215 +
 216 +       regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
 217 +}
 218 +
 219 +static int init_8960(struct tsens_device *tmdev)
 220 +{
 221 +       int ret, i;
 222 +       u32 reg_cntl;
 223 +
 224 +       tmdev->map = dev_get_regmap(tmdev->dev, NULL);
 225 +       if (!tmdev->map)
 226 +               return -ENODEV;
 227 +
 228 +       /*
 229 +        * The status registers for each sensor are discontiguous
 230 +        * because some SoCs have 5 sensors while others have more
 231 +        * but the control registers stay in the same place, i.e
 232 +        * directly after the first 5 status registers.
 233 +        */
 234 +       for (i = 0; i < tmdev->num_sensors; i++) {
 235 +               if (i >= 5)
 236 +                       tmdev->sensor[i].status = S0_STATUS_ADDR + 40;
 237 +               tmdev->sensor[i].status += i * 4;
 238 +       }
 239 +
 240 +       reg_cntl = SW_RST;
 241 +       ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl);
 242 +       if (ret)
 243 +               return ret;
 244 +
 245 +       if (tmdev->num_sensors > 1) {
 246 +               reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
 247 +               reg_cntl &= ~SW_RST;
 248 +               ret = regmap_update_bits(tmdev->map, CONFIG_ADDR,
 249 +                                        CONFIG_MASK, CONFIG);
 250 +       } else {
 251 +               reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
 252 +               reg_cntl &= ~CONFIG_MASK_8660;
 253 +               reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
 254 +       }
 255 +
 256 +       reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT;
 257 +       ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
 258 +       if (ret)
 259 +               return ret;
 260 +
 261 +       reg_cntl |= EN;
 262 +       ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
 263 +       if (ret)
 264 +               return ret;
 265 +
 266 +       return 0;
 267 +}
 268 +
 269 +static int calibrate_8960(struct tsens_device *tmdev)
 270 +{
 271 +       int i;
 272 +       char *data;
 273 +
 274 +       ssize_t num_read = tmdev->num_sensors;
 275 +       struct tsens_sensor *s = tmdev->sensor;
 276 +
 277 +       data = qfprom_read(tmdev->dev, "calib");
 278 +       if (IS_ERR(data))
 279 +               data = qfprom_read(tmdev->dev, "calib_backup");
 280 +       if (IS_ERR(data))
 281 +               return PTR_ERR(data);
 282 +
 283 +       for (i = 0; i < num_read; i++, s++)
 284 +               s->offset = data[i];
 285 +
 286 +       return 0;
 287 +}
 288 +
 289 +/* Temperature on y axis and ADC-code on x-axis */
 290 +static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
 291 +{
 292 +       int slope, offset;
 293 +
 294 +       slope = thermal_zone_get_slope(s->tzd);
 295 +       offset = CAL_MDEGC - slope * s->offset;
 296 +
 297 +       return adc_code * slope + offset;
 298 +}
 299 +
 300 +static int get_temp_8960(struct tsens_device *tmdev, int id, int *temp)
 301 +{
 302 +       int ret;
 303 +       u32 code, trdy;
 304 +       const struct tsens_sensor *s = &tmdev->sensor[id];
 305 +       unsigned long timeout;
 306 +
 307 +       timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
 308 +       do {
 309 +               ret = regmap_read(tmdev->map, INT_STATUS_ADDR, &trdy);
 310 +               if (ret)
 311 +                       return ret;
 312 +               if (!(trdy & TRDY_MASK))
 313 +                       continue;
 314 +               ret = regmap_read(tmdev->map, s->status, &code);
 315 +               if (ret)
 316 +                       return ret;
 317 +               *temp = code_to_mdegC(code, s);
 318 +               return 0;
 319 +       } while (time_before(jiffies, timeout));
 320 +
 321 +       return -ETIMEDOUT;
 322 +}
 323 +
 324 +const struct tsens_ops ops_8960 = {
 325 +       .init           = init_8960,
 326 +       .calibrate      = calibrate_8960,
 327 +       .get_temp       = get_temp_8960,
 328 +       .enable         = enable_8960,
 329 +       .disable        = disable_8960,
 330 +       .suspend        = suspend_8960,
 331 +       .resume         = resume_8960,
 332 +};
 333 +
 334 +const struct tsens_data data_8960 = {
 335 +       .num_sensors    = 11,
 336 +       .ops            = &ops_8960,
 337 +};
 338 --- a/drivers/thermal/qcom/tsens.c
 339 +++ b/drivers/thermal/qcom/tsens.c
 340 @@ -122,10 +122,10 @@ static int tsens_probe(struct platform_d
 341         np = dev->of_node;
 342
 343         id = of_match_node(tsens_table, np);
 344 -       if (!id)
 345 -               return -EINVAL;
 346 -
 347 -       data = id->data;
 348 +       if (id)
 349 +               data = id->data;
 350 +       else
 351 +               data = &data_8960;
 352
 353         if (data->num_sensors <= 0) {
 354                 dev_err(dev, "invalid number of sensors\n");
 355 --- a/drivers/thermal/qcom/tsens.h
 356 +++ b/drivers/thermal/qcom/tsens.h
 357 @@ -87,6 +87,6 @@ void compute_intercept_slope(struct tsen
 358  int init_common(struct tsens_device *);
 359  int get_temp_common(struct tsens_device *, int, int *);
 360
 361 -extern const struct tsens_data data_8916, data_8974;
 362 +extern const struct tsens_data data_8916, data_8974, data_8960;
 363
 364  #endif /* __QCOM_TSENS_H__ */