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1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Thu, 27 Oct 2022 19:53:57 +0200
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: increase tx ring side for
4 QDMA devices
5
6 In order to use the hardware traffic shaper feature, a larger tx ring is
7 needed, especially for the scratch ring, which the hardware shaper uses to
8 reorder packets.
9
10 Signed-off-by: Felix Fietkau <nbd@nbd.name>
11 ---
12
13 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
14 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
15 @@ -944,7 +944,7 @@ static int mtk_init_fq_dma(struct mtk_et
16 {
17 const struct mtk_soc_data *soc = eth->soc;
18 dma_addr_t phy_ring_tail;
19 - int cnt = MTK_DMA_SIZE;
20 + int cnt = MTK_QDMA_RING_SIZE;
21 dma_addr_t dma_addr;
22 int i;
23
24 @@ -2208,19 +2208,25 @@ static int mtk_tx_alloc(struct mtk_eth *
25 struct mtk_tx_ring *ring = &eth->tx_ring;
26 int i, sz = soc->txrx.txd_size;
27 struct mtk_tx_dma_v2 *txd;
28 + int ring_size;
29
30 - ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
31 + if (MTK_HAS_CAPS(soc->caps, MTK_QDMA))
32 + ring_size = MTK_QDMA_RING_SIZE;
33 + else
34 + ring_size = MTK_DMA_SIZE;
35 +
36 + ring->buf = kcalloc(ring_size, sizeof(*ring->buf),
37 GFP_KERNEL);
38 if (!ring->buf)
39 goto no_tx_mem;
40
41 - ring->dma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
42 + ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz,
43 &ring->phys, GFP_KERNEL);
44 if (!ring->dma)
45 goto no_tx_mem;
46
47 - for (i = 0; i < MTK_DMA_SIZE; i++) {
48 - int next = (i + 1) % MTK_DMA_SIZE;
49 + for (i = 0; i < ring_size; i++) {
50 + int next = (i + 1) % ring_size;
51 u32 next_ptr = ring->phys + next * sz;
52
53 txd = ring->dma + i * sz;
54 @@ -2240,22 +2246,22 @@ static int mtk_tx_alloc(struct mtk_eth *
55 * descriptors in ring->dma_pdma.
56 */
57 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
58 - ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
59 + ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, ring_size * sz,
60 &ring->phys_pdma, GFP_KERNEL);
61 if (!ring->dma_pdma)
62 goto no_tx_mem;
63
64 - for (i = 0; i < MTK_DMA_SIZE; i++) {
65 + for (i = 0; i < ring_size; i++) {
66 ring->dma_pdma[i].txd2 = TX_DMA_DESP2_DEF;
67 ring->dma_pdma[i].txd4 = 0;
68 }
69 }
70
71 - ring->dma_size = MTK_DMA_SIZE;
72 - atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
73 + ring->dma_size = ring_size;
74 + atomic_set(&ring->free_count, ring_size - 2);
75 ring->next_free = ring->dma;
76 ring->last_free = (void *)txd;
77 - ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
78 + ring->last_free_ptr = (u32)(ring->phys + ((ring_size - 1) * sz));
79 ring->thresh = MAX_SKB_FRAGS;
80
81 /* make sure that all changes to the dma ring are flushed before we
82 @@ -2267,14 +2273,14 @@ static int mtk_tx_alloc(struct mtk_eth *
83 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr);
84 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr);
85 mtk_w32(eth,
86 - ring->phys + ((MTK_DMA_SIZE - 1) * sz),
87 + ring->phys + ((ring_size - 1) * sz),
88 soc->reg_map->qdma.crx_ptr);
89 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
90 mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES,
91 soc->reg_map->qdma.qtx_cfg);
92 } else {
93 mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
94 - mtk_w32(eth, MTK_DMA_SIZE, MT7628_TX_MAX_CNT0);
95 + mtk_w32(eth, ring_size, MT7628_TX_MAX_CNT0);
96 mtk_w32(eth, 0, MT7628_TX_CTX_IDX0);
97 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx);
98 }
99 @@ -2292,7 +2298,7 @@ static void mtk_tx_clean(struct mtk_eth
100 int i;
101
102 if (ring->buf) {
103 - for (i = 0; i < MTK_DMA_SIZE; i++)
104 + for (i = 0; i < ring->dma_size; i++)
105 mtk_tx_unmap(eth, &ring->buf[i], NULL, false);
106 kfree(ring->buf);
107 ring->buf = NULL;
108 @@ -2300,14 +2306,14 @@ static void mtk_tx_clean(struct mtk_eth
109
110 if (ring->dma) {
111 dma_free_coherent(eth->dma_dev,
112 - MTK_DMA_SIZE * soc->txrx.txd_size,
113 + ring->dma_size * soc->txrx.txd_size,
114 ring->dma, ring->phys);
115 ring->dma = NULL;
116 }
117
118 if (ring->dma_pdma) {
119 dma_free_coherent(eth->dma_dev,
120 - MTK_DMA_SIZE * soc->txrx.txd_size,
121 + ring->dma_size * soc->txrx.txd_size,
122 ring->dma_pdma, ring->phys_pdma);
123 ring->dma_pdma = NULL;
124 }
125 @@ -2832,7 +2838,7 @@ static void mtk_dma_free(struct mtk_eth
126 netdev_reset_queue(eth->netdev[i]);
127 if (eth->scratch_ring) {
128 dma_free_coherent(eth->dma_dev,
129 - MTK_DMA_SIZE * soc->txrx.txd_size,
130 + MTK_QDMA_RING_SIZE * soc->txrx.txd_size,
131 eth->scratch_ring, eth->phy_scratch_ring);
132 eth->scratch_ring = NULL;
133 eth->phy_scratch_ring = 0;
134 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
135 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
136 @@ -27,6 +27,7 @@
137 #define MTK_MAX_RX_LENGTH_2K 2048
138 #define MTK_TX_DMA_BUF_LEN 0x3fff
139 #define MTK_TX_DMA_BUF_LEN_V2 0xffff
140 +#define MTK_QDMA_RING_SIZE 2048
141 #define MTK_DMA_SIZE 512
142 #define MTK_MAC_COUNT 2
143 #define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + ETH_FCS_LEN)
Staging tree of Matthias Schiffer