git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 965b47cbf16a6d1bc8235e1bff038abc9b4cf142 Mon Sep 17 00:00:00 2001
   2 From: Ioana Radulescu <ruxandra.radulescu@nxp.com>
   3 Date: Wed, 4 Sep 2019 19:45:01 +0300
   4 Subject: [PATCH] dpaa2-eth: Minor cleanup in dpaa2_eth_set_rx_taildrop()
   5
   6 Make clear the setting refers to FQ-based taildrop and the threshold
   7 value is given in bytes (the default option).
   8
   9 Reverse the logic of the second argument (pass tx_pause transparently).
  10 This will be helpful further on.
  11
  12 Also don't set the device's Rx taildrop flag unless configuration
  13 succeeds.
  14
  15 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
  16 ---
  17  drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 19 +++++++++++--------
  18  drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h |  4 ++--
  19  2 files changed, 13 insertions(+), 10 deletions(-)
  20
  21 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
  22 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
  23 @@ -1228,17 +1228,20 @@ static void disable_ch_napi(struct dpaa2
  24         }
  25  }
  26
  27 -static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv, bool enable)
  28 +static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv,
  29 +                                     bool tx_pause)
  30  {
  31         struct dpni_taildrop td = {0};
  32         struct dpaa2_eth_fq *fq;
  33         int i, err;
  34
  35 -       if (priv->rx_td_enabled == enable)
  36 +       td.enable = !tx_pause;
  37 +       if (priv->rx_td_enabled == td.enable)
  38                 return;
  39
  40 -       td.enable = enable;
  41 -       td.threshold = DPAA2_ETH_TAILDROP_THRESH;
  42 +       /* FQ taildrop: thrshold is in bytes, per frame queue */
  43 +       td.threshold = DPAA2_ETH_FQ_TAILDROP_THRESH;
  44 +       td.units = DPNI_CONGESTION_UNIT_BYTES;
  45
  46         for (i = 0; i < priv->num_fqs; i++) {
  47                 fq = &priv->fq[i];
  48 @@ -1249,12 +1252,12 @@ static void dpaa2_eth_set_rx_taildrop(st
  49                                         fq->tc, fq->flowid, &td);
  50                 if (err) {
  51                         netdev_err(priv->net_dev,
  52 -                                  "dpni_set_taildrop() failed\n");
  53 -                       break;
  54 +                                  "dpni_set_taildrop(FQ) failed\n");
  55 +                       return;
  56                 }
  57         }
  58
  59 -       priv->rx_td_enabled = enable;
  60 +       priv->rx_td_enabled = td.enable;
  61  }
  62
  63  static void update_tx_fqids(struct dpaa2_eth_priv *priv);
  64 @@ -1277,7 +1280,7 @@ static int link_state_update(struct dpaa
  65          * only when pause frame generation is disabled.
  66          */
  67         tx_pause = dpaa2_eth_tx_pause_enabled(state.options);
  68 -       dpaa2_eth_set_rx_taildrop(priv, !tx_pause);
  69 +       dpaa2_eth_set_rx_taildrop(priv, tx_pause);
  70
  71         /* Chech link state; speed / duplex changes are not treated yet */
  72         if (priv->link_state.up == state.up)
  73 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
  74 +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
  75 @@ -39,7 +39,7 @@
  76   * frames in the Rx queues (length of the current frame is not
  77   * taken into account when making the taildrop decision)
  78   */
  79 -#define DPAA2_ETH_TAILDROP_THRESH      (64 * 1024)
  80 +#define DPAA2_ETH_FQ_TAILDROP_THRESH   (64 * 1024)
  81
  82  /* Maximum number of Tx confirmation frames to be processed
  83   * in a single NAPI call
  84 @@ -51,7 +51,7 @@
  85   * how many 64B frames fit inside the taildrop threshold and add a margin
  86   * to accommodate the buffer refill delay.
  87   */
  88 -#define DPAA2_ETH_MAX_FRAMES_PER_QUEUE (DPAA2_ETH_TAILDROP_THRESH / 64)
  89 +#define DPAA2_ETH_MAX_FRAMES_PER_QUEUE (DPAA2_ETH_FQ_TAILDROP_THRESH / 64)
  90  #define DPAA2_ETH_NUM_BUFS             (DPAA2_ETH_MAX_FRAMES_PER_QUEUE + 256)
  91  #define DPAA2_ETH_REFILL_THRESH \
  92         (DPAA2_ETH_NUM_BUFS - DPAA2_ETH_BUFS_PER_CMD)