git.openwrt.org Git - openwrt/staging/ldir.git/blob

   1 From 8070fa91b95e20cd270c8d76bf45f2a5423358bf Mon Sep 17 00:00:00 2001
   2 From: Song Hui <hui.song_1@nxp.com>
   3 Date: Fri, 6 Sep 2019 19:42:59 +0800
   4 Subject: [PATCH] gpio/mpc8xxx: change irq handler from chained to normal
   5
   6 More than one gpio controllers can share one interrupt, change the
   7 driver to request shared irq.
   8
   9 While this will work, it will mess up userspace accounting of the number
  10 of interrupts per second in tools such as vmstat.  The reason is that
  11 for every GPIO interrupt, /proc/interrupts records the count against GIC
  12 interrupt 68 or 69, as well as the GPIO itself.  So, for every GPIO
  13 interrupt, the total number of interrupts that the system has seen
  14 increments by two.
  15
  16 Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@nxp.com>
  17 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  18 Signed-off-by: Song Hui <hui.song_1@nxp.com>
  19 ---
  20  drivers/gpio/gpio-mpc8xxx.c | 30 +++++++++++++++++++-----------
  21  1 file changed, 19 insertions(+), 11 deletions(-)
  22
  23 --- a/drivers/gpio/gpio-mpc8xxx.c
  24 +++ b/drivers/gpio/gpio-mpc8xxx.c
  25 @@ -22,6 +22,7 @@
  26  #include <linux/irq.h>
  27  #include <linux/gpio/driver.h>
  28  #include <linux/bitops.h>
  29 +#include <linux/interrupt.h>
  30
  31  #define MPC8XXX_GPIO_PINS      32
  32
  33 @@ -127,20 +128,19 @@ static int mpc8xxx_gpio_to_irq(struct gp
  34                 return -ENXIO;
  35  }
  36
  37 -static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
  38 +static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
  39  {
  40 -       struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
  41 -       struct irq_chip *chip = irq_desc_get_chip(desc);
  42 +       struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
  43         struct gpio_chip *gc = &mpc8xxx_gc->gc;
  44 -       unsigned int mask;
  45 +       unsigned long mask;
  46 +       int i;
  47
  48         mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
  49                 & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
  50 -       if (mask)
  51 -               generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
  52 -                                                    32 - ffs(mask)));
  53 -       if (chip->irq_eoi)
  54 -               chip->irq_eoi(&desc->irq_data);
  55 +       for_each_set_bit(i, &mask, 32)
  56 +               generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 31 - i));
  57 +
  58 +       return IRQ_HANDLED;
  59  }
  60
  61  static void mpc8xxx_irq_unmask(struct irq_data *d)
  62 @@ -414,8 +414,16 @@ static int mpc8xxx_probe(struct platform
  63         if (devtype->gpio_dir_in_init)
  64                 devtype->gpio_dir_in_init(gc);
  65
  66 -       irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
  67 -                                        mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
  68 +       ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn,
  69 +                              mpc8xxx_gpio_irq_cascade,
  70 +                              IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
  71 +                              mpc8xxx_gc);
  72 +       if (ret) {
  73 +               dev_err(&pdev->dev, "%s: failed to devm_request_irq(%d), ret = %d\n",
  74 +                       np->full_name, mpc8xxx_gc->irqn, ret);
  75 +               goto err;
  76 +       }
  77 +
  78         return 0;
  79  err:
  80         iounmap(mpc8xxx_gc->regs);