015a917e20995d15a6434c477fcf70f681f9eabd
[openwrt/staging/zorun.git] /
1 From 1aec193ea41d672d11592714cdda8167eb3b38fc Mon Sep 17 00:00:00 2001
2 From: Abhishek Sahu <absahu@codeaurora.org>
3 Date: Wed, 18 Mar 2020 14:16:56 +0100
4 Subject: ipq806x: gcc: Added the enable regs and mask for PRNG
5
6 Kernel got hanged while reading from /dev/hwrng at the
7 time of PRNG clock enable
8
9 Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
10 Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
11 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
12 Link: https://lkml.kernel.org/r/20200318131657.345-1-ansuelsmth@gmail.com
13 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
14 ---
15 drivers/clk/qcom/gcc-ipq806x.c | 2 ++
16 1 file changed, 2 insertions(+)
17
18 --- a/drivers/clk/qcom/gcc-ipq806x.c
19 +++ b/drivers/clk/qcom/gcc-ipq806x.c
20 @@ -1225,6 +1225,8 @@ static struct clk_rcg prng_src = {
21 .parent_map = gcc_pxo_pll8_map,
22 },
23 .clkr = {
24 + .enable_reg = 0x2e80,
25 + .enable_mask = BIT(11),
26 .hw.init = &(struct clk_init_data){
27 .name = "prng_src",
28 .parent_names = gcc_pxo_pll8,